EL9200IL Intersil, EL9200IL Datasheet - Page 10

• Manufacturer Part Number: EL9200IL
• Description: IC AMP VCOM PROGRAMMABLE 12-DFN
• Manufacturer: Intersil

Specifications of EL9200IL

• Applications: TFT-LCD Panels: VCOM Driver
• Output Type: Rail-to-Rail
• Number Of Circuits: 1
• -3db Bandwidth: 44MHz
• Slew Rate: 80 V/µs
• Current - Supply: 3.8mA
• Current - Output / Channel: 65mA
• Voltage - Supply, Single/dual (±): 4.5 V ~ 16.5 V, ±2.25 V ~ 8.25 V
• Mounting Type: Surface Mount
• Package / Case: 12-DFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Amplifier Typical Performance Curves
Application Information
This device provides the ability to reduce the flicker of an
LCD panel by adjustment of the V
production test and alignment. A 128-step resolution is
provided under digital control which adjusts the sink current
of the output. The output is connected to an external voltage
divider, so that the device will have the capability to reduce
the voltage on the output by increasing the output sink
current.
The adjustment of the output and the programming of the
non-volatile memory are provided on one pin while the
counter enable (CE) is provided on a separate pin. The
output is adjusted via the CTL pin either by counting up with
a mid to low transition or by counting down with a mid to high
transition. Once the minimum or maximum value is reached
on the 128 steps, the device will not overflow or underflow
beyond that minimum or maximum value. An increment of
the counter will increase the output sink current which will
lower the voltage on the external voltage divider. A
decrement of the counter will decrease the output sink
current, which will raise the voltage on the external voltage
divider.
Once the desired output level is obtained, the part can store
it's setting using the non-volatile memory in the device. See
the “Non-Volatile Memory (EEPROM) Programming” on
page 12 for detailed information.
Note: Once the desired output level is stored in the
EEPROM, the CE pin must go low to preserve the stored
value.
FIGURE 25. PACKAGE POWER DISSIPATION vs AMBIENT
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD - QFN EXPOSED
DIEPAD SOLDERED TO PCB PER JESD51-5
TEMPERATURE
3.378W
25
AMBIENT TEMPERATURE (°C)
50
10
75
COM
85
100
voltage during
125
EL9200, EL9201, EL9202
150
(Continued)
Adjustable Sink Current Output
The device provides an output sink current which lowers the
voltage on the external voltage divider. The equations that
control the output are given in Equation 1:
I
V
NOTE: Where setting is an integer between 1 and 128.
7-Bit Up/Down Counter
The counter sets the level to the digital potentiometer and is
connected to the non-volatile memory. When the part is
programmed, the counter setting is loaded into the
non-volatile memory. This value will be loaded from the
non-volatile memory into the counter during power-on. The
counter will not exceed its maximum level and will hold that
value during subsequent increment requests on the CTL pin.
The counter will not exceed its minimum level and will hold
that value during subsequent decrement requests on the
CTL pin.
CTL Pin
CTL should have a noise filter to reduce bouncing or noise
on the input that could cause unwanted counting when the
CE pin is high. The board should have an additional ESD
protection circuit, with a series 1kΩ resistor and a shunt
0.01µF capacitor connected on the CTL pin.
In order to increment the setting, pulse CTL low for more
than 200µs. The output sink current increases and lowers
the V
other hand, to decrement the setting, pulse CTL high for
OUT
OUT
FIGURE 26. PACKAGE POWER DISSIPATION vs AMBIENT
COM
=
=
Setting
-------------------- -
⎛
⎜
⎝
-------------------- -
R
128
1.2
1.0
0.8
0.6
0.4
0.2
lever by one least-significant bit (LSB). On the
1
0
R
0
+
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
2
TEMPERATURE
893mW
R
×
2
⎞
⎟
⎠
-------------------------- -
20 R
V
25
A
AVDD
(
AMBIENT TEMPERATURE (°C)
VDD
SET
⎛
⎜
⎝
50
1
)
–
Setting
-------------------- -
128
75
85
×
-------------------------- -
20 R
100
(
R
SET
1
125
)
⎞
⎟
⎠
October 30, 2008
150
FN7438.1
(EQ. 1)