EL4093CSZ-T7 Intersil, EL4093CSZ-T7 Datasheet - Page 9

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EL4093CSZ-T7

Manufacturer Part Number
EL4093CSZ-T7
Description
IC VIDEO AMP 300MHZ 16-SOIC
Manufacturer
Intersil
Datasheet

Specifications of EL4093CSZ-T7

Applications
Current Feedback
Number Of Circuits
1
-3db Bandwidth
300MHz
Slew Rate
1500 V/µs
Current - Supply
9.5mA
Current - Output / Channel
100mA
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EL4093CSZ-T7
Manufacturer:
AOS
Quantity:
14 500
Autozero Interface
The autozero interface refers to the connection between the
S/H output and the CFA inverting input. This interface has
been greatly simplified compared to that of the EL2090, in
that the S/H output is a high impedance current source. The
S/H output can be connected directly to the inverting input,
and its high impedance greatly reduces the interaction
between the sample & hold and the gain setting resistors.
Another virtue of this interface is better gain linearity as the
autozero current changes. For example, at an autozero
current of 0mA the output impedance is about 5MΩ,
dropping to 1MΩ as the autozero current increases to 3mA.
Using R
by 0.025% in this interval.
Autozero Range
The autozero range is defined as the difference between the
input DC level and the reference voltage to restore to. The
size of this range is a function of the gain setting resistors
used and the S/H output current swing. For a gain of +2 the
optimum feedback resistor is 750Ω, and the available S/H
output current is ±5.5mA minimum. To determine the
autozero range for this case, we refer to Figure 3 below.
Suppose that the input DC level is +V
reference voltage is 0V. We know that in feedback, the
following two conditions will exist on the CFA: first, its output
will be equal to 0V (due to autozero), and second, its V
voltage is equal to the V
we have a potential difference of +V
R
flow into each of them. This current I
G
, resulting in a current I
GAIN
+1
+2
+5
-1
F
= R
G
= 750Ω, the closed loop gain changes only
OPTIMUM RF
910
750
470
680
IN
FIGURE 3.
+ voltage (i.e. V
RF
= I
9
RG
BW (MHz)
DC
= V
314
300
294
300
AZ
DC
DC
across both R
= (I
, and that the
IN
/750Ω that must
RF
- = +V
PEAKING (dB)
+ I
RG
DC
0.2
0.2
) must
0
0
). So
F
IN
and
-
EL4093
come from the S/H output. Since the maximum that I
be is 5.5mA, we can solve for V
and see that V
accommodate most video signals.
As another example, consider the case where we are
restoring to a reference voltage of +0.75V. Using the same
reasoning as above, a current I
flow through R
R
≤ ±5.5mA, and we can solve for the allowable V
using the following:
Hence V
illustrates that when the reference changes, the autozero
range also changes. In general, the user should determine
the autozero range for his/her application, and ensure that
the input signal is within this range during the autozero
period.
Autozero Loop Bandwidth
The gain-bandwidth product (GBWP) of the autozero loop is
determined by the size of the hold capacitor, the value of R
and the transconductances (gm’s) of the S/H amplifier. To
begin, the S/H amplifier is modeled as in Figure 4. First, the
input stage transconductance is represented by gm1, with
the compensation capacitor given by C
GBWP is thus gm1/(2π • C
207kHz. Next, since the S/H has a current output, its output
stage can be modeled as a transconductance gm2, in this
case having a value of 1/(500Ω). The current from gm2 then
flows through the I to V converter made up of the CFA and
R
loop is given by:
G
F
. Again, our boundary condition is that I
to produce a voltage gain. Thus the GBWP of the overall
DC
must be between +2.4V to -1.7V. This example
GBWP
DC
F
, and a current I
±
I
5.5mA
AZ
= ±2V. This range can easily
=
=
±
=
-------------------------------- - gm2
5.5mA
V
--------------------------------- -
HOLD
DC
×
gm1
C
750Ω
HOLD
=
RF
RG
DC
0.75V
) = 1/(2π • (350Ω)(2.2nF)) =
2
= (V
-------------- -
750Ω
= V
using the following:
V
(
DC
+
DC
DC
HOLD
-------------- -
750Ω
V
×
DC
/R
- 0.75V)/R
RF
R
G
F
. This stage’s
)
must go into
+ I
DC
RG
values
AZ
F
must
can
F
,

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