SAM3N00B Atmel Corporation, SAM3N00B Datasheet - Page 314
SAM3N00B
Manufacturer Part Number
SAM3N00B
Description
Manufacturer
Atmel Corporation
- Current page: 314 of 752
- Download datasheet (17Mb)
21.8.2
Name:
Address:
Access:
• SLOT_CYCLE: Maximum Number of Allowed Cycles for a Burst
When the SLOT_CYCLE limit is reach for a burst it may be broken by another master trying to access this slave.
This limit has been placed to avoid locking very slow slaves when very long bursts are used.
This limit should not be very small though. An unreasonable small value will break every burst and the Bus Matrix will
spend its time to arbitrate without performing any data transfer. 16 cycles is a reasonable value for SLOT_CYCLE.
• DEFMSTR_TYPE: Default Master Type
0: No Default Master
At the end of current slave access, if no other master request is pending, the slave is disconnected from all masters.
This results in having a one cycle latency for the first access of a burst transfer or for a single access.
1: Last Default Master
At the end of current slave access, if no other master request is pending, the slave stays connected to the last master hav-
ing accessed it.
This results in not having the one cycle latency when the last master re-tries access on the slave again.
2: Fixed Default Master
At the end of the current slave access, if no other master request is pending, the slave connects to the fixed master the
number that has been written in the FIXED_DEFMSTR field.
This results in not having the one cycle latency when the fixed master re-tries access on the slave again.
• FIXED_DEFMSTR: Fixed Default Master
This is the number of the Default Master for this slave. Only used if DEFMSTR_TYPE is 2. Specifying the number of a mas-
ter which is not connected to the selected slave is equivalent to setting DEFMSTR_TYPE to 0.
• ARBT: Arbitration Type
0: Round-Robin Arbitration
1: Fixed Priority Arbitration
2: Reserved
3: Reserved
11011A–ATARM–04-Oct-10
31
23
15
–
–
–
7
Bus Matrix Slave Configuration Registers
MATRIX_SCFG0..MATRIX_SCFG3
0x400E0240
Read-write
30
22
14
–
–
–
6
29
21
13
–
–
–
5
28
20
12
–
–
4
SLOT_CYCLE
FIXED_DEFMSTR
27
19
11
–
–
3
26
18
10
–
–
2
25
17
9
–
1
DEFMSTR_TYPE
ARBT
SAM3N
24
16
8
–
0
314
Related parts for SAM3N00B
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Cortex M3 Flash Microcontroller Converges Performance and Simplicity
Manufacturer:
ATMEL [ATMEL Corporation]
Datasheet:
Part Number:
Description:
INTERVAL AND WIPE/WASH WIPER CONTROL IC WITH DELAY
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Low-Voltage Voice-Switched IC for Hands-Free Operation
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
MONOLITHIC INTEGRATED FEATUREPHONE CIRCUIT
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
AM-FM Receiver IC U4255BM-M
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Monolithic Integrated Feature Phone Circuit
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Multistandard Video-IF and Quasi Parallel Sound Processing
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
High-performance EE PLD
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
8-bit Flash Microcontroller
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
2-Wire Serial EEPROM
Manufacturer:
ATMEL Corporation
Datasheet: