AT32UC3C1512C Automotive Atmel Corporation, AT32UC3C1512C Automotive Datasheet - Page 90
AT32UC3C1512C Automotive
Manufacturer Part Number
AT32UC3C1512C Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.AT32UC3C0512C_AUTOMOTIVE.pdf
(1312 pages)
3.AT32UC3C0512C_AUTOMOTIVE.pdf
(107 pages)
- AT90CAN128_AUTOMOTIVE PDF datasheet
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- AT32UC3C0512C_AUTOMOTIVE PDF datasheet #3
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• Bit 0– TOV0: Timer/Counter0 Overflow Flag
The bit TOV0 is set when an overflow occurs in timer/counter 0. TOV0 is cleared by hardware
when executing the corresponding interrupt handling vector. Alternatively, TOV0 is cleared by
writing a logical one to the flag. When the SREG I-bit, TOIE0 (timer/counter 0 overflow inter-
rupt enable), and TOV0 are set, the timer/counter 0 overflow interrupt is executed.
The setting of this flag is dependent of the WGM02:0 bit setting. See
Table 13-8 on page 86
and
“Waveform Generation Mode Bit Description” on page
86.
Atmel ATtiny24/44/84 [Preliminary]
90
7701E–AVR–02/11
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