SAM9261 Atmel Corporation, SAM9261 Datasheet - Page 35
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SAM9261
Manufacturer Part Number
SAM9261
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9260.pdf
(290 pages)
2.SAM9261.pdf
(248 pages)
3.SAM9261.pdf
(749 pages)
4.SAM9261.pdf
(44 pages)
5.SAM9261.pdf
(1274 pages)
6.SAM9261.pdf
(43 pages)
Specifications of SAM9261
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Ssc
3
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
160
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No/Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
32khz Rtc
Yes
Calibrated Rc Oscillator
No
10.5
10.6
10.7
11053AS–ATARM–27-Jul-11
Serial Synchronous Controller (SSC)
Timer Counter (TC)
High Speed MultimediaCard Interface (HSMCI)
• One SSC
• Provides serial synchronous communication links used in audio and telecom applications
• Contains an independent receiver and transmitter and a common clock divider
• Offers a configurable frame sync and data length
• Receiver and transmitter can be programmed to start automatically or on detection of
• Receiver and transmitter include a data signal, a clock signal and a frame synchronization
• Dual three 32-bit Timer Counter Channels
• Double PWM generation
• Capture/Waveform mode
• Wide range of functions including:
• Each channel is user-configurable and contains:
• Two global registers that act on all three TC Channels
• Two 4-bit HSMCI controllers
• Compatibility with MMC Plus Specification Version 4.3
• Compatibility with MultiMedia Card Specification Version 4.1
• Compatibility with SD Memory Card Specification Version 2.0
• Compatibility with SDIO Specification Version V2.0.
• Compatibility with CE ATA
(with CODECs in Master or Slave Modes, I
different event on the frame sync signal
signal
– Frequency Measurement
– Event Counting
– Interval Measurement
– Pulse Generation
– Delay Timing
– Pulse Width Modulation
– Up/down Capabilities
– Three external clock inputs
– Five internal clock inputs
– Two multi-purpose input/output signals
2
S, TDM Buses, Magnetic Card Reader, ...)
SAM9G35
35