SAM3S2C Atmel Corporation, SAM3S2C Datasheet - Page 1103
SAM3S2C
Manufacturer Part Number
SAM3S2C
Description
Manufacturer
Atmel Corporation
Specifications of SAM3S2C
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
39
Hardware Qtouch Acquisition
No
Max I/o Pins
47
Ext Interrupts
47
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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6500C–ATARM–8-Feb-11
Doc. Rev.
6500B
Comments
RTC:
Section 14.4.2
SPI:
Section 30.8.9 “SPI Chip Select
added a note concerning data transfer.
Section 30.8.3 “SPI Receive Data
added a note on requirements.
Section 30.7.3.5 “Peripheral
TC:
Figure 34-3, "Clock Selection"
Section 34.7.2 “TC Block Mode
TXC2XC2S bitfield description tables.
Section 34.7.11 “TC Channel Mode Register: Waveform
Selection”
UART:
“CD: Clock
Figure 32-1, "UART Functional Block
UDP:
Section 37.3.1 “Signal
Section 37.4.1 “I/O
Global; references to “DP”, “DM”, changed to “DPP”, “DMM”.
Table 37-6, “Register
w/endpoint info.
Section 37.7.10 “UDP Endpoint Control and Status
USART:
“CD: Clock
Section 33.7.1 “Baud Rate
Section 33.7.1.3 “Baud Rate in Synchronous Mode or SPI
Confusing text references to “DMAC/PDC“ replaced by PDC.
bitfield description
Divisor”, bitfield description updated in UART_BRGR.
Divider”, bitfield description, baud rate formula corrected in US_BRGR.
“Interrupt”, updated.
Lines”, updated.
Mapping”, Offsets and Names for UDP_CSRY and Endpoint UDP_FDRY updated
Description”, added to datasheet.
Generator”, updated “
Selection”, added a paragraph at the end of the section.
and
Register”, updated Name and Description columns in TC0XC0S, TXC1XC1S,
Register”, after bit description
Register”, after bit description
Figure 34-5, "Capture
Diagram", updated.
The frequency of the signal provided on SCK...”
Register”, code updated.
Mode”In the TC_CMR register
Mode", updated w/ synchronous edge detection.
Mode”, updated, “the receive part limits the SCK...”
“SCBR: Serial Clock Baud Rate” on page
“PCS: Peripheral Chip Select” on page
“WAVSEL: Waveform
603,
611,
SAM3S
Change
Request
Ref.
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7096
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6895
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1103
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