SAM3S1B Atmel Corporation, SAM3S1B Datasheet - Page 442
SAM3S1B
Manufacturer Part Number
SAM3S1B
Description
Manufacturer
Atmel Corporation
Specifications of SAM3S1B
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
10
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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26.15 Write Protection Registers
To prevent any single software error that may corrupt PMC behavior, certain address spaces
can be write-protected by setting the WPEN bit in the
“PMC Write Protect Mode Register”
(PMC_WPMR).
If a write access to the protected registers is detected, then the WPVS flag in the PMC Write
Protect Status Register (PMC_WPSR) is set and the field WPVSRC indicates in which register
the write access has been attempted.
The WPVS flag is reset by writing the PMC Write Protect Mode Register (PMC_WPMR) with the
appropriate access key, WPKEY.
The protected registers are:
“PMC System Clock Enable Register” on page 444
“PMC System Clock Disable Register” on page 445
“PMC Peripheral Clock Enable Register 0” on page 447
“PMC Peripheral Clock Disable Register 0” on page 448
“PMC Clock Generator Main Oscillator Register” on page 450
“PMC Clock Generator PLLA Register” on page 453
“PMC Clock Generator PLLB Register” on page 454
“PMC Master Clock Register” on page 455
“PMC USB Clock Register” on page 456
“PMC Programmable Clock Register” on page 457
“PMC Fast Startup Mode Register” on page 463
“PMC Fast Startup Polarity Register” on page 464
“PMC Peripheral Clock Enable Register 1” on page 468
“PMC Peripheral Clock Disable Register 1” on page 469
“PMC Oscillator Calibration Register” on page 471
SAM3S
442
6500C–ATARM–8-Feb-11
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