ATxmega192D3 Atmel Corporation, ATxmega192D3 Datasheet - Page 12
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
ATxmega192D3
Manufacturer Part Number
ATxmega192D3
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega192D3
Flash (kbytes)
192 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
2
Uart
3
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
18
Input Capture Channels
18
Pwm Channels
18
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega192D3-AU
Manufacturer:
CYPRESS
Quantity:
101
Company:
Part Number:
ATxmega192D3-AU
Manufacturer:
ATMEL
Quantity:
70
Company:
Part Number:
ATxmega192D3-H
Manufacturer:
SQ
Quantity:
719
Company:
Part Number:
ATxmega192D3-MH
Manufacturer:
Atmel
Quantity:
565
7.4.1
7.4.2
7.4.3
8134I–AVR–12/10
I/O Memory
SRAM Data Memory
EEPROM Data Memory
All peripherals and modules are addressable through I/O memory locations in the data memory
space. All I/O memory locations can be accessed by the Load (LD/LDS/LDD) and Store
(ST/STS/STD) instructions, transferring data between the 32 general purpose registers in the
CPU and the I/O Memory.
The IN and OUT instructions can address I/O memory locations in the range 0x00 - 0x3F
directly.
I/O registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and
CBI instructions. The value of single bits can be checked by using the SBIS and SBIC instruc-
tions on these registers.
The I/O memory address for all peripherals and modules in XMEGA D3 is shown in the
eral Module Address Map” on page
The XMEGA D3 devices have internal SRAM memory for data storage.
The XMEGA D3 devices have internal EEPROM memory for non-volatile data storage. It is
addressable either in a separate data space or it can be memory mapped into the normal data
memory space. The EEPROM memory supports both byte and page access.
51.
XMEGA D3
”Periph-
12