ATxmega128A3 Atmel Corporation, ATxmega128A3 Datasheet - Page 177

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ATxmega128A3

Manufacturer Part Number
ATxmega128A3
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega128A3

Flash (kbytes)
128 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Speed
No
Usb Interface
No
Spi
10
Twi (i2c)
2
Uart
7
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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15.3
8077H–AVR–12/09
Port Override
The Pattern Generation unit can be used to generate a synchronized bit pattern on the port it is
connected to. In addition, the waveform generator output from the Compare Channel A can be
distributed to and override all the port pins. When the Pattern Generator unit is enabled the DTI
unit is bypassed.
The Fault Protection unit is connected to the Event System, enabling any event to trigger a fault
condition that will disable the AWeX output.
Common for all the timer/counter extensions is the port override logic.
shows a schematic diagram of the port override logic. When the dead-time enable (DTIENx) bit
is set the timer/counter extension takes control over the pin pair for the corresponding channel.
Given this condition the Output Override Enable (OOE) bits takes control over the CCxEN.
Note that timer/counter 1 (TCx1) can still be used even when DTI channels A, B, and D are
enabled.
Figure 15-2 on page 178
XMEGA A
177

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