ATUC256L4U Atmel Corporation, ATUC256L4U Datasheet - Page 228

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ATUC256L4U

Manufacturer Part Number
ATUC256L4U
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATUC256L4U

Flash (kbytes)
256 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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228
AVR32
MTDR – Move to Debug Register
Architecture revision:
Architecture revision1 and higher.
Description
The instruction copies the value in the specified register to the specified debug register. Note
that special timing concerns must be considered when operating on the system registers, see
the Pipeline Chapter for details.
Operation:
I.
Syntax:
I.
Operands:
I.
Status Flags:
Opcode:
Note:
The debug registers are implementation defined, and updates of these registers are handled in
an implementation specific way.
This instruction can only be executed in a privileged mode. Execution from any other mode will
trigger a Privilege Violation exception.
31
1
15
0
DebugRegister[DebugRegisterAddress << 2] ← Rs;
mtdr
DebugRegisterAddress ∈ {0, 4, 8, ..., 1020}
Q:
V:
N:
Z:
C:
1
0
1
0
DebugRegisterAddress, Rs
Not affected.
Not affected.
Not affected.
Not affected.
Not affected.
0
0
0
0
1
0
1
0
8
1
0
7
1
0
Debug Register Ad-
1
20
1
19
Rs
32000D–04/2011
0
16

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