ATtiny84 Atmel Corporation, ATtiny84 Datasheet - Page 83

• Manufacturer Part Number: ATtiny84
• Manufacturer: Atmel Corporation

Specifications of ATtiny84

• Flash (kbytes): 8 Kbytes
• Pin Count: 14
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 6
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 12
• Ext Interrupts: 12
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

11.9.2
8006K–AVR–10/10
TCCR0B – Timer/Counter Control Register B
Table 11-8.
Note:
• Bit 7 – FOC0A: Force Output Compare A
The FOC0A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0A bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC0A output is
changed according to its COM0A1:0 bits setting. Note that the FOC0A bit is implemented as a
strobe. Therefore it is the value present in the COM0A1:0 bits that determines the effect of the
forced compare.
A FOC0A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR0A as TOP.
The FOC0A bit is always read as zero.
• Bit 6 – FOC0B: Force Output Compare B
The FOC0B bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0B bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC0B output is
changed according to its COM0B1:0 bits setting. Note that the FOC0B bit is implemented as a
strobe. Therefore it is the value present in the COM0B1:0 bits that determines the effect of the
forced compare.
Bit
0x33 (0x53)
Read/Write
Initial Value
Mode
0
1
2
3
4
5
6
7
1. MAX
BOTTOM = 0x00
WGM02
Waveform Generation Mode Bit Description
0
0
0
0
1
1
1
1
FOC0A
W
7
0
= 0xFF
WGM01
FOC0B
0
0
1
1
0
0
1
1
W
6
0
WGM00
0
1
0
1
0
1
0
1
R
5
–
0
Timer/Counter
Mode of Operation
Normal
PWM, Phase
Correct
CTC
Fast PWM
Reserved
PWM, Phase
Correct
Reserved
Fast PWM
R
4
–
0
WGM02
R/W
3
0
CS02
R/W
2
0
OCRA
OCRA
OCRA
0xFF
0xFF
0xFF
TOP
–
–
ATtiny24/44/84
CS01
R/W
1
0
Immediate
Immediate
Update of
BOTTOM
BOTTOM
OCRx at
TOP
TOP
–
–
CS00
R/W
0
0
TOV Flag
BOTTOM
BOTTOM
Set on
TCCR0B
MAX
MAX
MAX
TOP
–
–
(1)
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