ATtiny167 Atmel Corporation, ATtiny167 Datasheet - Page 19

• Manufacturer Part Number: ATtiny167
• Manufacturer: Atmel Corporation

Specifications of ATtiny167

• Flash (kbytes): 16 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 9
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8265BS–AVR–09/10
3. ‘Disable Clock Source’ command remains enabled.
; (*) !!! Loose gain control of crystal oscillator !!!
; ==> WORKAROUND ...
; ...
In the Dynamic Clock Switch module, the ‘Disable Clock Source’ command remains run-
ning after disabling the targeted clock source (the clock source is set in the CLKSELR
register).
Problem fix / workaround.
After a ‘Disable Clock Source’ command, reset the CLKCSR register writing 0x80.
Code example:
; (*) !!! At this moment, if any other clock source is selected by
CLKSELR,
;
; ==> WORKAROUND ...
; Select watchdog clock ( 128KHz, fast rising power)
; Select crystal oscillator
; Disable clock source (crystal oscillator)
sts
ldi
sts
sts
ldi
sts
ldi
ldi
sts
sts
sts
this clock source will also stop !!!
CLKCSR,temp3
temp3,((0x03<<CSEL0)|(0x02<<CSUT0))
CLKSELR, temp3
CLKSELR, temp1
temp1,(0x0F<<CSEL0)
CLKSELR, temp1
temp2,(1<<CLKCCE)
temp3,(0x01<<CLKC0)
CLKCSR,temp2
CLKCSR,temp3
CLKCSR,temp2
; Clock source switch
; (*)
; CSEL = "0001"
; Enable CLKCSR register access
; (*) Disable crystal oscillator clock
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