ATmega645P Atmel Corporation, ATmega645P Datasheet - Page 155
ATmega645P
Manufacturer Part Number
ATmega645P
Description
Manufacturer
Atmel Corporation
Specifications of ATmega645P
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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8285D–AVR–06/11
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
Table 18-3.
Table 18-4
PWM mode.
Table 18-4.
Note:
Table 18-5
correct PWM mode.
Table 18-5.
Note:
COM2A1
COM2A1
COM2A1
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the com-
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the com-
pare match is ignored, but the set or clear is done at TOP. See
for more details.
pare match is ignored, but the set or clear is done at TOP. See
page 147
shows the COM2A[1:0] bit functionality when the WGM2[1:0] bits are set to phase
shows the COM2A[1:0] bit functionality when the WGM2[1:0] bits are set to fast
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
Compare Output Mode, Phase Correct PWM Mode
COM2A0
COM2A0
COM2A0
for more details.
0
1
0
1
0
1
0
1
0
1
0
1
Description
Normal port operation, OC2A disconnected.
Reserved
Clear OC2A on compare match, set OC2A at BOTTOM
(non-inverting mode).
Set OC2A on compare match, clear OC2A at BOTTOM
(inverting mode).
Description
Normal port operation, OC2A disconnected.
Reserved
Clear OC2A on compare match when up-counting. Set OC2A on
compare match when down counting.
Set OC2A on compare match when up-counting. Clear OC2A on
compare match when down counting.
Description
Normal port operation, OC2A disconnected.
Toggle OC2A on compare match.
Clear OC2A on compare match.
Set OC2A on compare match.
(1)
(1)
”Fast PWM Mode” on page 146
”Phase Correct PWM Mode” on
155
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