ATmega32M1 Automotive Atmel Corporation, ATmega32M1 Automotive Datasheet - Page 20
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ATmega32M1 Automotive
Manufacturer Part Number
ATmega32M1 Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.ATMEGA16M1_AUTOMOTIVE.pdf
(12 pages)
3.ATMEGA16M1_AUTOMOTIVE.pdf
(25 pages)
4.ATMEGA16M1_AUTOMOTIVE.pdf
(367 pages)
Specifications of ATmega32M1 Automotive
Flash (kbytes)
32 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
14
Input Capture Channels
1
Pwm Channels
10
32khz Rtc
No
Calibrated Rc Oscillator
Yes
7647DS–AVR–08/08
5. Wrong TSOFFSET manufacturing calibration value.
6. PD0-PD3 set to outputs and PD4 pulled down following power-on with external reset
a. Slave task of master node:
b. For slaves nodes, the workaround is in 2 parts:
The time-out counter is disabled during the RESPONSE when the workaround is set.
Erroneous value of TSOFFSET programmed in signature byte.
(TSOFFSET was introduced from REVB silicon).
Problem fix / workaround
To identify RevB with wrong TSOFFSET value, check device signature byte at address
0X3F if value is not 0X42 (Ascii code ‘B’) then use the following formula.
TS_OFFSET(True) = (150*(1-TS_GAIN))+TS_OFFSET.
active.
At power-on with the external reset signal active the four I/O lines PD0-PD3 may be forced
into an output state. Normally these lines should be in an input state. PD4 may be pulled
down with internal 220 kOhm resistor. Following release of the reset line (whatever is the
startup time) with the clock running the I/Os PD0-PD4 will adopt their intended input state.
Problem fix / workaround
None
Before enabling the HEADER, the master must set the appropriate LIN13 bit value in
LINCR register.
– Before enabling the RESPONSE, use the following function:
– Once the RESPONSE is received or sent (having RxOK or TxOK as well as
LERR), use the following function:
unsigned char
}
void
}
void
temp = LINBTR;
LINCR = 0x00;
LINBTR = (1<<LDISR)|temp;
LINCR
LINDLR = 0x88;
LINCR = 0x00;
LINBTR = 0x00;
LINCR
lin_wa_tail(void)
lin_wa_head(void) {
= (1<<LIN13)|(1<<LENA)|(0<<LCMD2)|(0<<LCMD1)|(0<<LCMD0);
= (0<<LIN13)|(1<<LENA)|(0<<LCMD2)|(0<<LCMD1)|(0<<LCMD0);
temp;
// It is not a RESET !
// If it isn't already done
// It is not a RESET !
{
ATmega16/32/64/M1/C1
21