ATmega164P Automotive Atmel Corporation, ATmega164P Automotive Datasheet - Page 22

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ATmega164P Automotive

Manufacturer Part Number
ATmega164P Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATmega164P Automotive

Flash (kbytes)
16 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
6.5
I/O Memory
The I/O space definition of the ATmega164P/324P/644P is shown in
“Register Summary” on
page
356.
All ATmega164P/324P/644P I/Os and peripherals are placed in the I/O space. All I/O locations
may be accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data between
the 32 general purpose working registers and the I/O space. I/O Registers within the address
range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these regis-
ters, the value of single bits can be checked by using the SBIS and SBIC instructions. Refer to
the instruction set section for more details. When using the I/O specific commands IN and OUT,
the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space
u s i n g L D a n d S T i n s t r u c t i o n s , 0 x 2 0 m u s t b e a d d e d t o t h e s e a d d r e s s e s . T h e
ATmega164P/324P/644P is a complex microcontroller with more peripheral units than can be
supported within the 64 location reserved in Opcode for the IN and OUT instructions. For the
Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instruc-
tions can be used.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most
other AVRs, the CBI and SBI instructions will only operate on the specified bit, and can therefore
be used on registers containing such Status Flags. The CBI and SBI instructions work with reg-
isters 0x00 to 0x1F only.
The I/O and peripherals control registers are explained in later sections.
The ATmega164P/324P/644P contains three General Purpose I/O Registers, see
“Register
Description” on page
23. These registers can be used for storing any information, and they are
particularly useful for storing global variables and Status Flags. General Purpose I/O Registers
within the address range 0x00 - 0x1F are directly bit-accessible using the SBI, CBI, SBIS, and
SBIC instructions.
ATmega164P/324P/644P
22
7674F–AVR–09/09

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