ATmega1280R231 Atmel Corporation, ATmega1280R231 Datasheet - Page 332
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ATmega1280R231
Manufacturer Part Number
ATmega1280R231
Description
Manufacturer
Atmel Corporation
Specifications of ATmega1280R231
Flash (kbytes)
128 Kbytes
Max. Operating Frequency
16 MHz
Max I/o Pins
86
Spi
5
Twi (i2c)
1
Uart
4
Adc Channels
16
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
8
Eeprom (bytes)
4096
Operating Voltage (vcc)
1.8 to 3.6
Timers
6
Frequency Band
2.4 GHz
Max Data Rate (mb/s)
2
Antenna Diversity
Yes
External Pa Control
Yes
Power Output (dbm)
3
Receiver Sensitivity (dbm)
-101
Receive Current Consumption (ma)
13.2
Transmit Current Consumption (ma)
14.4
Link Budget (dbm)
104
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29.7
29.7.1
2549N–AVR–05/11
Register Description
SPMCSR – Store Program Memory Control and Status Register
Table 29-14. Read-While-Write Limit, ATmega2560/2561
Note:
Table 29-15. Explanation of different variables used in
Notes:
The Store Program Memory Control and Status Register contains the control bits needed to con-
trol the Boot Loader operations.
• Bit 7 – SPMIE: SPM Interrupt Enable
When the SPMIE bit is written to one, and the I-bit in the Status Register is set (one), the SPM
ready interrupt will be enabled. The SPM ready Interrupt will be executed as long as the SPMEN
bit in the SPMCSR Register is cleared.
Bit
0x37 (0x57)
Read/Write
Initial Value
Section
Read-While-Write section (RWW)
No Read-While-Write section (NRWW)
Variable
PCMSB
PAGEMSB
ZPCMSB
ZPAGEMSB
PCPAGE
PCWORD
1. For details about these two section, see
1. Z0: should be zero for all SPM commands, byte select for the (E)LPM instruction.
2. See
3. The Z-register is only 16 bits wide. Bit 16 is located in the RAMPZ register in the I/O map.
(1)
318
Z-pointer during Self-Programming.
ping to the Z-pointer, ATmega2560/2561
SPMIE
and
“Addressing the Flash During Self-Programming” on page 322
R/W
7
0
PC[16:7]
PC[6:0]
“RWW – Read-While-Write Section” on page
16
6
RWWSB
R
6
0
Corresponding
Z17:Z16
Z-value
ATmega640/1280/1281/2560/2561
Z17
SIGRD
R/W
Z7:Z1
5
0
Z7
(3)
:Z8
(2)
(3)
RWWSRE
R/W
4
0
Description
Most significant bit in the Program Counter. (The
Program Counter is 17 bits PC[16:0]).
Most significant bit which is used to address the
words within one page (128 words in a page
requires seven bits PC [6:0]).
Bit in Z-pointer that is mapped to PCMSB. Because
Z0 is not used, the ZPCMSB equals PCMSB + 1.
Bit in Z-pointer that is mapped to PCMSB. Because
Z0 is not used, the ZPAGEMSB equals PAGEMSB +
1.
Program Counter page address: Page select, for
Page Erase and Page Write.
Program Counter word address: Word select, for
filling temporary buffer (must be zero during Page
Write operation).
“NRWW – No Read-While-Write Section” on page
BLBSET
R/W
3
0
Figure 29-3 on page 322
Pages
992
32
(1)
318.
PGWRT
R/W
2
0
Address
0x00000 - 0x1EFFF
0x1F000 - 0x1FFFF
PGERS
for details about the use of
R/W
1
0
SPMEN
R/W
and the map-
0
0
SPMCSR
332
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