AT89C51RC2 Atmel Corporation, AT89C51RC2 Datasheet - Page 17
AT89C51RC2
Manufacturer Part Number
AT89C51RC2
Description
Manufacturer
Atmel Corporation
Specifications of AT89C51RC2
Flash (kbytes)
32 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
32
Spi
1
Uart
1
Sram (kbytes)
1.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART
Watchdog
Yes
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Figure 6. Mode Switching Waveforms
4180E–8051–10/06
XTAL1
XTAL1:2
X2 Bit
CPU Clock
x1 Mode
The X2 bit in the CKCON0 register (see Table 15) allows a switch from 12 clock periods
per instruction to 6 clock periods and vice versa. At reset, the speed is set according to
X2 bit of Hardware Security Byte (HSB). By default, Standard mode is active. Setting the
X2 bit activates the X2 feature (X2 mode).
The T0X2, T1X2, T2X2, UARTX2, PCAX2, and WDX2 bits in the CKCON0 register
(Table 15) and SPIX2 bit in the CKCON1 register (see Table 16) allow a switch from
standard peripheral speed (12 clock periods per peripheral clock cycle) to fast periph-
eral speed (6 clock periods per peripheral clock cycle). These bits are active only in X2
mode.
F
OSC
X2 Mode
AT89C51RB2/RC2
X1 Mode
17