AT89C51ED2 Atmel Corporation, AT89C51ED2 Datasheet - Page 38
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AT89C51ED2
Manufacturer Part Number
AT89C51ED2
Description
Manufacturer
Atmel Corporation
Specifications of AT89C51ED2
Flash (kbytes)
64 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
32
Spi
1
Uart
1
Sram (kbytes)
2
Eeprom (bytes)
2048
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART
Watchdog
Yes
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38
AT89C51RD2/ED2
Table 13-2.
CCON - PCA Counter Control Register (D8h)
Reset Value = 00X0 0000b
Bit addressable
The watchdog timer function is implemented in Module 4 (See Figure 13-4).
The PCA interrupt system is shown in Figure 13-2.
Number
CF
Bit
7
7
6
5
4
3
2
1
0
Mnemonic
CCON Register
CCF4
CCF3
CCF2
CCF1
CCF0
CR
Bit
CF
CR
6
-
Description
PCA Counter Overflow flag
Set by hardware when the counter rolls over. CF flags an interrupt if bit ECF in CMOD is
set. CF
may be set by either hardware or software but can only be cleared by software.
PCA Counter Run control bit
Must be cleared by software to turn the PCA counter off.
Set by software to turn the PCA counter on.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
PCA Module 4 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
PCA Module 3 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
PCA Module 2 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
PCA Module 1 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
PCA Module 0 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
5
-
CCF4
4
CCF3
3
CCF2
2
CCF1
1
4235K–8051–05/08
CCF0
0