AT89C51AC2 Atmel Corporation, AT89C51AC2 Datasheet - Page 2

• Manufacturer Part Number: AT89C51AC2
• Manufacturer: Atmel Corporation

Specifications of AT89C51AC2

• Flash (kbytes): 32 Kbytes
• Max. Operating Frequency: 40 MHz
• Cpu: 8051-12C
• Max I/o Pins: 34
• Uart: 1
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 62.5
• Sram (kbytes): 1.25
• Eeprom (bytes): 2048
• Self Program Memory: API
• Operating Voltage (vcc): 3.0 to 5.5
• Timers: 4
• Isp: UART
• Watchdog: Yes

4. Movc Instruction on Boot Memory from Boot Memory Does Not Work
5. Power OFF Flag
6. Timer 2 – Baud Rate Generator – No IT When TF2 is Set by Software
7. Timer 2 – Baud Rate Generator – Long Start Time
8. UART – RB8 Lost With JBC on SCON Register
9. ADC – Interrupt Controller/ADC Idle Mode/Loops In High Priority Interrupt
10. Flash/EEPROM – First Read After Load Disturbed
2
No Movc instruction is performed when a program running on the boot memory tries to read its own code by the Movc
instruction.
Workaround
None.
Power ON Flag does not work.
Workaround
None.
When Timer 2 is used in baud rate generator mode, setting TF2 by software does not generate an interrupt.
Workaround
Use Timer 1 instead of Timer 2 to generate baud rate and interrupt.
When Timer 2 is used as baud rate generator, TH2 is not loaded with RCAP2H at the beginning, then UART is not
operational before 10000 machine cycles.
Workaround
Add the initialization of TH2 and TL2 in the initialization of Timer 2.
May lose RB8 value, if RB8 changes from 1 to 0 during JBC instruction on SCON register.
Workaround
Clear RB8 at the beginning of the code and after each time it goes to 1.
The problem occurs during an A/D conversion in idle mode if a hardware interrupt occurs followed by a second inter-
rupt with higher priority before the end of the A/D conversion. If the above configuration occurs, the highest priority
interrupt is served immediately after the A/D conversion. At the end of the highest priority interrupt service, the proces-
sor will not serve the hardware reset interrupt pending. It will also not serve any new interrupt requests with a priority
lower than the high level priority last served.
Workaround
Disable all interrupts (Interrupt Global Enable Bit) before starting an A/D conversion in idle mode, then re-enable all
interrupts immediately after.
This “Read After Load” problem does not occur with Atmel Bootloader (workaround 2 is lmplemented).
In the "In-Application Programming" mode from the Flash, if the user software application loads the Column Latch Area
prior to call the programming sequence in the Bootloader, the "Read after load" issue leads to a wrong Opcode Fetch
during the column latch load sequence.
Workaround
Two workarounds are possible:
4159G–8051–05/06