AT89C51AC2 Atmel Corporation, AT89C51AC2 Datasheet - Page 4

• Manufacturer Part Number: AT89C51AC2
• Manufacturer: Atmel Corporation

Specifications of AT89C51AC2

• Flash (kbytes): 32 Kbytes
• Max. Operating Frequency: 40 MHz
• Cpu: 8051-12C
• Max I/o Pins: 34
• Uart: 1
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 62.5
• Sram (kbytes): 1.25
• Eeprom (bytes): 2048
• Self Program Memory: API
• Operating Voltage (vcc): 3.0 to 5.5
• Timers: 4
• Isp: UART
• Watchdog: Yes

Mapping and Default
Value of Hardware
Security Byte
Security
4
A/T89C51AC2 UART Bootloader
The 4 Most Significant Byte (MSB) of the Hardware Byte can be read/written by software (this
area is called Fuse bits). The 4 Least Significant Byte (LSB) can only be read by software and
written by hardware in parallel mode (with parallel programmer devices).
Note:
The bootloader has Software Security Byte (SSB) to protect itself from user access or ISP
access.
The Software Security Byte (SSB) protects from ISP accesses. The command ’Program Soft-
ware Security Bit’ can only write a higher priority level. There are three levels of security:
•
•
•
Only a full chip erase command can reset the software security bits.
level 0: NO_SECURITY (FFh)
This is the default level.
From level 0, one can write level 1 or level 2.
level 1: WRITE_SECURITY (FEh)
In this level it is impossible to write in the Flash memory, BSB and SBV.
The Bootloader returns an error message.
From level 1, one can write only level 2.
level 2: RD_WR_SECURITY (FCh)
Level 2 forbids all read and write accesses to/from the Flash memory.
The Bootloader returns an error message.
Flash/EEPROM
Fuse bit
BSB & SBV & EB Any access allowed
SSB
Manufacturer info Read only access allowed
Bootloader info
Erase block
Full chip erase
Blank Check
Bit Position
U: Unprogram = 1
P: Program = 0
7
6
5
4
3
2
1
0
Mnemonic
Reserved
Reserved
Reserved
Level 0
Any access allowed
Any access allowed
Any access allowed
Read only access allowed
Allowed
Allowed
Allowed
BLJB
X2B
LB2
LB1
LB0
Default Value Description
U
P
U
U
U
P
U
U
To start in x1 mode
To map the boot area in code area between F800h-FFFFh
To lock the chip (see datasheet)
Level 1
Read only access allowed
Read only access allowed
Read only access allowed
Write level2 allowed
Read only access allowed
Read only access allowed
Not allowed
Allowed
Allowed
Level 2
All access not allowed
All access not allowed
All access not allowed
Read only access allowed
Read only access allowed
Read only access allowed
Not allowed
Allowed
Allowed
4231D–CAN–03/08