AT32UC3L0256 Atmel Corporation, AT32UC3L0256 Datasheet - Page 119

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AT32UC3L0256

Manufacturer Part Number
AT32UC3L0256
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT32UC3L0256

Flash (kbytes)
256 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
2
Uart
4
Lin
4
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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9.3.11
Table 9-13.
32000D–04/2011
Mnemonics
cop
ldc.d
ldc0.d
ldc.w
ldc0.w
ldcm.d
ldcm.w
ldcm.w
mvcr.d
mvcr.w
mvrc.d
mvrc.w
stc.d
stc0.d
stc.w
stc0.d
Coprocessor interface
Coprocessor Interface
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
Operands / Syntax
CP#, CRd, CRx,
CRy, Op
CP#, CRd, Rp[disp]
CP#, CRd, --Rp
CP#, CRd,
Rb[Ri<<sa]
CRd, Rp[disp]
CP#, CRd, Rp[disp]
CP#, CRd, --Rp
CP#, CRd,
Rb[Ri<<sa]
CRd, Rp[disp]
CP#, Rp{++},
ReglistCPD8
CP#, Rp{++},
ReglistCPH8
CP#, Rp{++},
ReglistCPL8
CP#, Rd, CRs
CP#, Rd, CRs
CP#, CRd, Rs
CP#, CRd, Rs
CP#, Rp[disp], CRs
CP#, Rp++, CRs
CP#, Rb[Ri<<sa],
CRs
Rp[disp], CRs
CP#, Rp[disp], CRs
CP#, Rp++, CRs
CP#, Rb[Ri<<sa],
CRs
Rp[disp], CRs
Description
Coprocessor operation.
Load coprocessor register
Load coprocessor register with pre-
decrement
Load coprocessor register with indexed
addressing
Load coprocessor 0 register
Load coprocessor register
Load coprocessor register with pre-
decrement
Load coprocessor register with indexed
addressing
Load coprocessor 0 register
Load multiple coprocessor double
registers
Load multiple coprocessor high
registers
Load multiple coprocessor low registers
Move from coprocessor to register
Move from coprocessor to register
Move from register to coprocessor
Move from register to coprocessor
Store coprocessor register
Store coprocessor register with post-
increment
Store coprocessor register with indexed
addressing
Store coprocessor 0 register
Store coprocessor register
Store coprocessor register with post-
increment
Store coprocessor register with indexed
addressing
Store coprocessor 0 register
Operation
CRd ← CRx Op CRy
CRd+1:CRd ← *(Rp+ZE(disp8<<2))
CRd+1:CRd ← *(--Rp)
CRd+1:CRd ← *(Rb+(Ri << sa2))
CRd+1:CRd ← *(Rp+ZE(disp12<<2))
CRd ← *(Rp+ZE(disp8<<2))
CRd ← *(--Rp)
CRd ← *(Rb+(Ri << sa2))
CRd ← *(Rp+ZE(disp12<<2))
See instruction set reference
See instruction set reference
See instruction set reference
Rd+1:Rd ← CRs+1:CRs
Rd ← CRs
CRd+1:CRd ← Rs+1:Rs
CRd ← Rs
*(Rp+ZE(disp8<<2)) ← CRs+1:CRs
*(Rp--) ← CRs+1:CRs
*(Rb+(Ri << sa2)) ← CRs+1:CRs
*(Rp+ZE(disp12<<2)) ← CRs+1:CRs
*(Rp+ZE(disp8<<2)) ← CRs
*(Rp++) ← CRs
*(Rb+(Ri << sa2)) ← CRs
*(Rp+ZE(disp12<<2)) ← CRs
AVR32
Rev
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
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