AT32UC3L0256 Atmel Corporation, AT32UC3L0256 Datasheet - Page 53
AT32UC3L0256
Manufacturer Part Number
AT32UC3L0256
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3L0128.pdf
(85 pages)
4.AT32UC3L0128.pdf
(852 pages)
Specifications of AT32UC3L0256
Flash (kbytes)
256 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
2
Uart
4
Lin
4
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3L0256-D3HR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
AT32UC3L0256-H
Manufacturer:
ATMEL
Quantity:
270
Part Number:
AT32UC3L0256-H
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
7.9
7.9.1
Table 7-38.
Note:
7.9.2
Table 7-39.
Note:
32145AS–12/2011
Parameter
Startup time from power-up, using
regulator
Startup time from power-up, no
regulator
Startup time from reset release
Wake-up
Wake-up from shutdown
Symbol
t
RESET
Timing Characteristics
1. These values are based on simulation and characterization of other AVR microcontrollers manufactured in the same pro-
1. These values are based on simulation and characterization of other AVR microcontrollers manufactured in the same pro-
Startup, Reset, and Wake-up Timing
RESET_N Timing
cess technology. These values are not covered by test limits in production.
cess technology. These values are not covered by test limits in production.
Maximum Reset and Wake-up Timing
RESET_N Waveform Parameters
Parameter
RESET_N minimum pulse length
Idle
Frozen
Standby
Stop
Deepstop
Static
The startup, reset, and wake-up timings are calculated using the following formula:
Where
clock source other than RCSYS is selected as the CPU clock, the oscillator startup time,
modes. Please refer to the source for the CPU clock in the
38
t
t
OSCSTART
=
for more details about oscillator startup times.
t
CONST
t
CONST
Time from VDDIN crossing the V
POR33 to the first instruction entering the decode
stage of CPU. VDDCORE is supplied by the internal
regulator.
Time from VDDIN crossing the V
POR33 to the first instruction entering the decode
stage of CPU. VDDCORE is connected to VDDIN.
Time from releasing a reset source (except POR18,
POR33, and SM33) to the first instruction entering
the decode stage of CPU.
From wake-up event to the first instruction of an
interrupt routine entering the decode stage of the
CPU.
From wake-up event to the first instruction entering
the decode stage of the CPU.
Measuring
, must be added to the wake-up time from the stop, deepstop, and static sleep
+
N
and
CPU
×
N
(1)
CPU
t
CPU
(1)
are found in
Conditions
Table
POT+
POT+
threshold of
threshold of
7-38.
t
CPU
AT32UC3L0128/256
Min
is the period of the CPU clock. If a
”Oscillator Characteristics” on page
Max
10
27 +
27 +
97 +
t
CONST
t
t
t
2210
1810
1180
OSCSTART
OSCSTART
OSCSTART
170
0
0
0
Max
(in µs)
Units
Max
ns
110
110
116
116
116
N
19
0
0
0
0
CPU
53