AT32UC3C2128C Atmel Corporation, AT32UC3C2128C Datasheet - Page 79
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
AT32UC3C2128C
Manufacturer Part Number
AT32UC3C2128C
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3C0128C.pdf
(1313 pages)
4.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C2128C
Flash (kbytes)
128 Kbytes
Pin Count
64
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
45
Ext Interrupts
64
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
5
Twi (i2c)
2
Uart
4
Can
2
Lin
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
36
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
13
Input Capture Channels
6
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3C2128C-A2UR
Manufacturer:
ATMEL
Quantity:
1 043
Part Number:
AT32UC3C2128C-Z2UR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Table 7-50.
Notes:
32117CS–AVR-08/11
t
t
t
t
t
t
t
t
t
t
t
f
Symbol
r
f
HD-STA
SU-STA
SU-STO
HD-DAT
SU-DAT-I2C
SU-DAT
LOW-I2C
LOW
HIGH
TWCK
1. Standard mode:
2. A device must internally provide a hold time of at least 300 ns for TWD with reference to the falling edge of TWCK.
TWCK and TWD rise time
TWCK and TWD fall time
(Repeated) START hold time
(Repeated) START set-up time
STOP set-up time
Data hold time
Data set-up time
TWCK LOW period
TWCK HIGH period
TWCK frequency
TWI-Bus Timing Requirements
Parameter
TWIM and TWIS user interface registers. Please refer to the TWIM and TWIS sections for more
information .
Notations:
C
t
t
The maximum t
f
clkpb
prescaled
TWCK
b
= total capacitance of one bus line in pF
= period of TWI peripheral bus clock
≤
= period of TWI internal prescaled clock (see chapters on TWIM and TWIS)
100 kHz
Standard
Fast
Standard
Fast
Standard
Fast
Standard
Fast
Standard
Fast
Standard
Fast
Standard
Fast
-
Standard
Fast
-
Standard
Fast
Standard
Fast
HD;DAT
Mode
; fast mode:
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
has only to be met if the device does not stretch the LOW period (t
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Requirement
f
TWCK
0.3
250
100
4.0
0.6
4.7
0.6
4.0
0.6
4.7
1.3
4.0
0.6
-
-
(2)
>
100 kHz
20 + 0.1 C
20 + 0.1 C
Minimum
-
-
-
.
b
b
Device
4t
2t
2t
4t
8t
t
t
t
t
clkpb
clkpb
clkpb
clkpb
clkpb
clkpb
clkpb
clkpb
clkpb
Requirement
3.45
100
400
0.9
Maximum
1000
300
300
300
-
-
-
-
-
-
-
-
AT32UC3C
----------------------- -
12t clkpb
Device
LOW-I2C
??
1
) of TWCK.
Unit
kHz
ns
ns
μs
μs
μs
μs
ns
μs
μs
-
-
79