AT32UC3C164C Atmel Corporation, AT32UC3C164C Datasheet - Page 201

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AT32UC3C164C

Manufacturer Part Number
AT32UC3C164C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT32UC3C164C

Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
81
Ext Interrupts
100
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
20
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
19
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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32000D–04/2011
LDMTS – Load Multiple Registers for Task Switch
Architecture revision:
Architecture revision1 and higher.
Description
Loads the consecutive words pointed to by Rp into the registers specified in the instruction.The
target registers reside in the User Register Context, regardless of which context the instruction is
called from.
Operation:
I.
Syntax:
I.
Operands:
I.
Status Flags:
Opcode:
Note:
This instruction is intended for performing task switches.
Emtpy Reglist16 gives UNDEFINED result.
PC in Reglist16 gives UNDEFINED result.
R15 R14 R13 R12 R11 R10 R9
31
1
15
Loadaddress ←Rp;
for (i = 15 to 0)
if Opcode[++] == 1 then
ldmts
Reglist16 ∈ {R0, R1, R2, ..., R12, LR, SP}
p ∈ {0, 1, …, 15}
Not affected.
1
29
1
if Reglist16[i] == 1 then
Rp ← Loadaddress;
Rp{++}, Reglist16
28
0
Ri
0
USER
26
1
←*(Loadaddress++);
++
25
R8
24
1
R7
1
R6
1
R5
0
R4
20
0
R3
19
R2
Rp
R1
AVR32
R0
0
16
201

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