AT32UC3B1256 Atmel Corporation, AT32UC3B1256 Datasheet - Page 202

• Manufacturer Part Number: AT32UC3B1256
• Manufacturer: Atmel Corporation

Specifications of AT32UC3B1256

• Flash (kbytes): 256 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 60 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 28
• Ext Interrupts: 28
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

202
AVR32
LDSWP.{SH, UH, W} – Load and Swap
Architecture revision:
Architecture revision1 and higher.
Description
This instruction loads a halfword or a word from memory. If a halfword load is performed, the
loaded value is zero- or sign-extended. The bytes in the loaded value are shuffled and the result
is written back to Rd. The instruction can be used for performing loads from memories of differ-
ent endianness.
Operation:
I.
II.
III.
Syntax:
I.
II.
III.
Operands:
I, II.
III.
Status Flags:
Opcode:
31
1
15
0
temp[15:0] ← *(Rp+SE(disp12) << 1);
Rd ← SE(temp[7:0], temp[15:8]);
temp[15:0] ← *(Rp+SE(disp12) << 1);
Rd ← ZE(temp[7:0], temp[15:8]);
temp ← *(Rp+SE(disp12) << 2);
Rd ← (temp[7:0], temp[15:8], temp[23:16], temp[31:24]);
ldswp.shRd, Rp[disp]
ldswp.uhRd, Rp[disp]
ldswp.w Rd, Rp[disp]
{d, p} ∈ {0, 1, …, 15}
disp ∈ {-4096, -4094, ..., 4094}
{d, p} ∈ {0, 1, …, 15}
disp ∈ {-8192, -8188, ..., 8188}
Q:
V:
N:
Z:
C:
Format I:
1
0
29
1
1
Not affected
Not affected
Not affected
Not affected
Not affected
28
12
0
11
Rp
25
24
1
1
1
disp12
0
20
1
19
Rd
32000D–04/2011
0
16