AT32UC3A464S Atmel Corporation, AT32UC3A464S Datasheet - Page 110
AT32UC3A464S
Manufacturer Part Number
AT32UC3A464S
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A464S
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
AES
Sram (kbytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A464S-U
Manufacturer:
ATMEL
Quantity:
551
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A3128 PDF datasheet #4
- AT32UC3A3128 PDF datasheet #5
- Current page: 110 of 377
- Download datasheet (5Mb)
9.3.5
Table 9-5.
110
Mnemonics
and
and{cond4}
andn
andh
andl
com
eor
eor{cond4}
eorh
eorl
or
or{cond4}
orh
orl
tst
AVR32
Logic Operations
Logic Operations
C
E
E
E
C
E
E
E
E
C
C
E
E
E
E
E
C
E
E
E
E
E
C
Operands / Syntax
Rd, Rs
Rd, Rx, Ry << sa
Rd, Rx, Ry >> sa
Rd, Rx, Ry
Rd, Rs
Rd, imm
Rd, imm, COH
Rd, imm
Rd, imm, COH
Rd
Rd, Rs
Rd, Rx, Ry << sa
Rd, Rx, Ry >> sa
Rd, Rx, Ry
Rd, imm
Rd, imm
Rd, Rs
Rd, Rx, Ry << sa
Rd, Rx, Ry >> sa
Rd, Rx, Ry
Rd, imm
Rd, imm
Rd, Rs
Description
Logical AND.
Logical AND if condition satisfied.
Logical AND NOT.
Logical AND High Halfword, low halfword is
unchanged.
Logical AND High Halfword, clear other
halfword.
Logical AND Low Halfword, high halfword
is unchanged.
Logical AND Low Halfword, clear other
halfword.
One’s Complement (NOT).
Logical Exclusive OR.
Logical EOR if condition satisfied.
Logical Exclusive OR
(High Halfword).
Logical Exclusive OR
(Low Halfword).
Logical (Inclusive) OR.
Logical OR if condition satisfied.
Logical OR (High Halfword).
Logical OR (Low Halfword).
Test register for zero.
Operation
Rd ← Rd ∧ Rs
Rd ← Rx ∧ (Ry << sa5)
Rd ← Rx ∧ (Ry >> sa5)
if (cond4) Rd ← Rx ∧ Ry
Rd ← Rd ∧ ¬Rs
Rd[31:16] ← Rd[31:16] ∧ imm16
Rd[31:16] ← Rd[31:16] ∧ imm16
Rd[15:0] ← 0
Rd[15:0] ← Rd[15:0] ∧ imm16
Rd[15:0] ← Rd[15:0] ∧ imm16
Rd[31:16] ← 0
Rd ← ¬Rd
Rd ← Rd ⊕ Rs
Rd ← Rd ⊕ (Rs << sa5)
Rd ← Rd ⊕ (Rs >> sa5)
if (cond4) Rd ← Rx ⊕ Ry
Rd[31:16] ← Rd[31:16] ⊕ imm16
Rd[15:0] ← Rd[15:0] ⊕ imm16
Rd ← Rd ∨ Rs
Rd ← Rd ∨ (Rs << sa5)
Rd ← Rd ∨ (Rs >> sa5)
if (cond4) Rd ← Rx ∨ Ry
Rd[31:16] ← Rd[31:16] ∨ imm16
Rd[15:0] ← Rd[15:0] ∨ imm16
Rd ∧ Rs
32000D–04/2011
Rev
1
1
1
2
1
1
1
1
1
1
1
1
1
2
1
1
1
1
1
2
1
1
1
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