AT32UC3A0128AU Atmel Corporation, AT32UC3A0128AU Datasheet - Page 220

• Manufacturer Part Number: AT32UC3A0128AU
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A0128AU

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 109
• Ext Interrupts: 109
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

220
AVR32
MFDR – Move from Debug Register
Architecture revision:
Architecture revision1 and higher.
Description
The instruction copies the value in the specified debug register to the specified register in the
register file. Note that special timing concerns must be considered when operating on the debug
registers, see the Pipeline Chapter for details.
Operation:
I.
Syntax:
I.
Operands:
I.
Status Flags:
Opcode:
Note:
Debug registers are implementation defined. If accessing a debug register that does not exist,
the result is UNDEFINED.
This instruction can only be executed in a privileged mode. Execution from any other mode will
trigger a Privilege Violation exception.
31
15
0
1
Rd ← DebugRegister[DebugRegisterAddress << 2];
mfdr
DebugRegisterNo ∈ {0, 4, 8, ..., 1020}
Q:
V:
N:
Z:
C:
0
1
0
1
Rd, DebugRegisterNo
Not affected.
Not affected.
Not affected.
Not affected.
Not affected.
0
0
0
0
1
0
0
0
8
0
1
7
1
0
Debug Register Ad-
1
20
1
19
Rd
32000D–04/2011
0
16