S524A60X51-SCT0 Samsung, S524A60X51-SCT0 Datasheet

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S524A60X51-SCT0

Manufacturer Part Number
S524A60X51-SCT0
Description
16 kBit Serial EEPROM for Low Power
Manufacturer
Samsung
Datasheet

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11-S5-24A Series-072001
DATA SHEET
2
S524A Series (I
C-Bus)
Serial EEPROM
Revision 1

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S524A60X51-SCT0 Summary of contents

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Series-072001 DATA SHEET 2 S524A Series (I Serial EEPROM Revision 1 C-Bus) ...

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S524A Series (I Serial EEPROM DATA SHEET 2 C-Bus) Revision 1 ...

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... Samsung reserves the right to make changes in its products or product specifications with the intent to improve function or design at any time and without notice and is not required to update this documentation to reflect such changes ...

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Serial EEPROM Selection Guide S524A40X10/40X20/40X40 S524A40X11/40X21/40X41/60X81/60X51 S524AB0X91/B0XB1 S524AD0XD1/D0XF1 S524AE0XH1 Packaging Information Application Note Marking Information Ordering Information ...

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... S524A40X11 1K-bit (128 8) S524A40X10 1K-bit (128 8) S524A40X21 2K-bit (256 8) S524A40X20 2K-bit (256 8) S524A40X41 4K-bit (512 8) S524A40X40 4K-bit (512 8) S524A60X81 8K-bit (1024 8) S524A60X51 16K-bit (2048 8) S524AB0X91 32K-bit (4096 8) S524AB0XB1 64K-bit (8192 8) S524AD0XD1 128K-bit (16384 8) S524AD0XF1 256K-bit (32768 8) Page Write Write Buffer Time ...

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SERIAL EEPROM SELECTION GUIDE 1-2 NOTES DATA SHEET ...

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... I C™-bus serial interface fabricated using Samsung’s most advanced CMOS technology. It has been developed for low power and low voltage applications (1 5.5 V). Important features are a hardware-based write protection circuit for the entire memory area and software-based write protection logic for the lower 128 bytes ...

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S524A40X10/40X20/40X40 SERIAL EEPROM SDA Start/Stop Logic WP SCL Slave Address Comparator Figure 2-1. S524A40X10/40X20/40X40 Block Diagram 2-2 Control Logic Word Address Row Pointer decoder D and ACK OUT DATA SHEET HV Generation Timing Control EEPROM Cell Array ...

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DATA SHEET Table 2-1. S524A40X10/40X20/40X40 Pin Descriptions Name Type A0, A1, A2 Input Input pins for device address selection. To configure a device address, these pins should be connected to the V These pins are internally pulled down to V ...

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S524A40X10/40X20/40X40 SERIAL EEPROM A0, A1, A2, WP Figure 2-3. Pin Circuit Type 1 SDA 2-4 SCL Figure 2-4. Pin Circuit Type Noise Filter Figure 2-5. Pin Circuit Type 3 DATA SHEET Noise Filter Data Out Data In ...

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DATA SHEET FUNCTION DESCRIPTION 2 I C-BUS INTERFACE The S524A40X10/40X20/40X40 supports the I consists of a serial data line (SDA) and a serial clock line (SCL). The SDA and the SCL lines must be connected pull-up ...

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S524A40X10/40X20/40X40 SERIAL EEPROM 2 I C-BUS PROTOCOLS 2 Here are several rules for I C-bus transfers: — A new data transfer can be initiated only when the bus is currently not busy. — MSB is always transferred first in transmitting ...

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DATA SHEET Master SCL Line Data from Transmitter ACK from Receiver Figure 2-8. Acknowledge Response From Receiver Slave Address: After the master initiates a Start condition, it must output the address of the device to be accessed. The most significant ...

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S524A40X10/40X20/40X40 SERIAL EEPROM BYTE WRITE OPERATION In a complete byte write operation, the master transmits the slave address, word address, and one data byte to the S524A40X10/40X20/40X40 slave device (see Figure 2-9). Start Slave Address Following the Start condition, the ...

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DATA SHEET PAGE WRITE OPERATION The S524A40X10/40X20/40X40 can also perform 16-byte page write operation. A page write operation is initiated in the same way as a byte write operation. However, instead of finishing the write operation after the first data ...

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S524A40X10/40X20/40X40 SERIAL EEPROM POLLING FOR AN ACK SIGNAL When the master issues a stop condition to initiate a write cycle, the S524A40X10/40X20/40X40 starts an internal write cycle. The master can then immediately begin polling for an ACK from the slave ...

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DATA SHEET SOFTWARE-BASED WRITE PROTECTION You can write-protect the lower 128 bytes of the EEPROM, locations 00H–7FH, in one operation this, you simply write a value to a one-time, write-only register. Once you have applied this write protection, ...

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S524A40X10/40X20/40X40 SERIAL EEPROM CURRENT ADDRESS BYTE READ OPERATION The internal word address pointer maintains the address of the last word accessed, incremented by one. Therefore, if the last access (either read or write) was to the address “n”, the next ...

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DATA SHEET RANDOM ADDRESS BYTE READ OPERATION Using random read operations, the master can access any memory location at any time. Before it issues the W slave address with the R/ bit set to “1”, the master must first perform ...

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S524A40X10/40X20/40X40 SERIAL EEPROM SEQUENTIAL READ OPERATION Sequential read operations can be performed in two ways series of current address reads or as random address reads. The first data is sent in the same way as the previous read ...

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DATA SHEET ELECTRICAL DATA ( Parameter Supply voltage Input voltage Output voltage Operating temperature Storage temperature Electrostatic discharge (T = – (C), – (I), ...

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S524A40X10/40X20/40X40 SERIAL EEPROM Table 2-4. D.C. Electrical Characteristics (Continued – (C), – (I Parameter Input capacitance Input/output capacitance (T = – ...

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DATA SHEET SCL t SU:STA SDA In SDA Out Figure 2-16. Timing Diagram for Bus Operations SCL SDA 8th Bit WORDn HIGH R t LOW t t HD:STA HD:DAT t AA ACK Stop Condition Figure 2-17. ...

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S524A40X10/40X20/40X40 SERIAL EEPROM 2-18 NOTES DATA SHEET ...

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... EEPROM (using the WP pin) EEPROM programming voltage generated on chip 1,000,000 erase/write cycles 100 years data retention 2 C™-bus serial interface fabricated using Samsung’s most advanced Operating Characteristics Operating voltage — 1 5.5 V Operating current — Maximum write current: < 5.5 V — ...

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S524A40X11/40X21/40X41/60X81/60X51 SERIAL EEPROM SDA Start/Stop Logic WP SCL Slave Address Comparator Figure 3-1. S524A40X11/40X21/40X41/60X81/60X51 Block Diagram 3-2 Control Logic Word Address Row Pointer decoder D and ACK OUT DATA SHEET HV Generation Timing Control EEPROM Cell Array ...

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DATA SHEET NOTE: Table 3-1. S524A40X11/40X21/40X41/60X81/60X51 Pin Descriptions Name Type A0, A1, A2 Input Input pins for device address selection. To configure a device address, these pins should be connected to the V These pins are internally pulled down to ...

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S524A40X11/40X21/40X41/60X81/60X51 SERIAL EEPROM A0, A1, A2, WP Figure 3-3. Pin Circuit Type 1 SDA 3-4 SCL Figure 3-4. Pin Circuit Type Noise Filter Figure 3-5. Pin Circuit Type 3 DATA SHEET Noise Filter Data Out Data In ...

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... Using the A0, A1, and A2 input pins eight S524A40X11/40X21 (four S524A40X41, two for S524A60X81, one for S524A60X51) devices can be connected to the same I slaves (see Figure 3-6). Both the master and slaves can operate as transmitter or receiver, but the master device determines which bus operating mode would be active ...

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S524A40X11/40X21/40X41/60X81/60X51 SERIAL EEPROM 2 I C-BUS PROTOCOLS 2 Here are several rules for I C-bus transfers: — A new data transfer can be initiated only when the bus is currently not busy. — MSB is always transferred first in transmitting ...

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... S524A60X51 on the bus (see Table 3-2 below). The b1 for S524A40X41 or the b1, b2 for S524A60X81 or the b1, b2, b3 for S524A60X51 are used by the master to select which of the blocks of internal memory (1 block = 256 words) are to be accessed. The bits are in effect the most significant bits of the word address. ...

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S524A40X11/40X21/40X41/60X81/60X51 SERIAL EEPROM BYTE WRITE OPERATION In a complete byte write operation, the master transmits the slave address, word address, and one data byte to the S524A40X11/40X21/40X41/60X81/60X51 slave device (see Figure 3-9). Start Slave Address Following the Start condition, the ...

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DATA SHEET PAGE WRITE OPERATION The S524A40X11/40X21/40X41/60X81/60X51 can also perform 16-byte page write operation. A page write operation is initiated in the same way as a byte write operation. However, instead of finishing the write operation after the first data ...

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S524A40X11/40X21/40X41/60X81/60X51 SERIAL EEPROM POLLING FOR AN ACK SIGNAL When the master issues a stop condition to initiate a write cycle, the S524A40X11/40X21/40X41/60X81/60X51 starts an internal write cycle. The master can then immediately begin polling for an ACK from the slave ...

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DATA SHEET HARDWARE-BASED WRITE PROTECTION You can also write-protect the entire memory area of the S524A40X11/40X21/40X41/60X81/60X51. This method of write protection is controlled by the state of the Write Protect (WP) pin. When the WP pin is connected to V ...

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S524A40X11/40X21/40X41/60X81/60X51 SERIAL EEPROM RANDOM ADDRESS BYTE READ OPERATION Using random read operations, the master can access any memory location at any time. Before it issues the W slave address with the R/ bit set to “1”, the master must first ...

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DATA SHEET SEQUENTIAL READ OPERATION Sequential read operations can be performed in two ways series of current address reads or as random address reads. The first data is sent in the same way as the previous read mode ...

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S524A40X11/40X21/40X41/60X81/60X51 SERIAL EEPROM ELECTRICAL DATA ( Parameter Supply voltage Input voltage Output voltage Operating temperature Storage temperature Electrostatic discharge (T = – (C), – ...

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DATA SHEET Table 3-4. D.C. Electrical Characteristics (Continued – (C), – (I Parameter Input capacitance Input/output capacitance (T = – ...

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S524A40X11/40X21/40X41/60X81/60X51 SERIAL EEPROM SCL t SU:STA SDA In SDA Out SCL SDA 8th Bit WORDn 3- HIGH t LOW t t HD:STA HD:DAT t AA Figure 3-15. Timing Diagram for Bus Operations ACK Stop Condition Figure 3-16. ...

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... I C™-bus serial interface fabricated using Samsung’s most advanced CMOS technology. It has been developed for low power and low voltage applications (1 5.5 V). One of its major feature is a hardware-based write protection circuit for the entire memory area. Hardware-based write protection is controlled by the state of the write-protect (WP) pin ...

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S524AB0X91/B0XB1 SERIAL EEPROM SDA Start/Stop Logic WP SCL Slave Address Comparator 4-2 Control Logic Word Address Pointer Figure 4-1. S524AB0X91/B0XB1 Block Diagram Row decoder D and ACK OUT DATA SHEET HV Generation Timing Control EEPROM Cell Array ...

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DATA SHEET Name Type A0, A1, A2 Input Input pins for device address selection. To configure a device address, these pins should be connected to the V These pins are internally pulled down – Ground pin. SS ...

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S524AB0X91/B0XB1 SERIAL EEPROM A0, A1, A2, WP Figure 4-3. Pin Circuit Type 1 SDA 4-4 SCL Figure 4-4. Pin Circuit Type Noise Filter Figure 4-5. Pin Circuit Type 3 DATA SHEET Noise Filter Data Out Data In ...

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DATA SHEET FUNCTION DESCRIPTION 2 I C-BUS INTERFACE The S524AB0X91/B0XB1 supports the I consists of a serial data line (SDA) and a serial clock line (SCL). The SDA and the SCL lines must be connected pull-up ...

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S524AB0X91/B0XB1 SERIAL EEPROM 2 I C-BUS PROTOCOLS 2 Here are several rules for I C-bus transfers: — A new data transfer can be initiated only when the bus is currently not busy. — MSB is always transferred first in transmitting ...

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DATA SHEET Master SCL Line Data from Transmitter ACK from Receiver Figure 4-8. Acknowledge Response From Receiver Slave Address: After the master initiates a start condition, it must output the address of the device to be accessed. The most significant ...

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S524AB0X91/B0XB1 SERIAL EEPROM BYTE WRITE OPERATION A write operation requires 2-byte word addresses, the first (high) word address and the second (low) word address byte write operation, the master transmits the slave address, the first word address, the ...

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DATA SHEET PAGE WRITE OPERATION The S524AB0X91/B0XB1 can also perform 32-byte page write operation. A page write operation is initiated in the same way as a byte write operation. However, instead of finishing the write operation after the first data ...

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S524AB0X91/B0XB1 SERIAL EEPROM POLLING FOR AN ACK SIGNAL When the master issues a stop condition to initiate a write cycle, the S524AB0X91/B0XB1 starts an internal write cycle. The master can then immediately begin polling for an ACK from the slave ...

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DATA SHEET HARDWARE-BASED WRITE PROTECTION You can also write-protect the entire memory area of the S524AB0X91/B0XB1. This write protection is controlled by the state of the Write Protect (WP) pin. When the WP pin is connected to V acknowledge slave ...

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S524AB0X91/B0XB1 SERIAL EEPROM RANDOM ADDRESS BYTE READ OPERATION Using random read operations, the master can access any memory location at any time. Before it issues the W slave address with the R/ bit set to “1”, the master must first ...

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DATA SHEET SEQUENTIAL READ OPERATION Sequential read operations can be performed in two ways: current address sequential read operation, and random address sequential read operation. The first data is sent in either of the two ways, current address byte read ...

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S524AB0X91/B0XB1 SERIAL EEPROM ELECTRICAL DATA ( Parameter Supply voltage Input voltage Output voltage Operating temperature Storage temperature Electrostatic discharge (T = – (Commercial), – ...

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DATA SHEET Table 4-3. D.C. Electrical Characteristics (Continued – (Commercial), – (Industrial Parameter Input capacitance Input/Output capacitance (T = – ...

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S524AB0X91/B0XB1 SERIAL EEPROM SCL t SU:STA SDA In SDA Out SCL SDA 8th Bit WORDn 4- HIGH t LOW t t HD:STA HD:DAT t AA Figure 4-16. Timing Diagram for Bus Operations ACK Stop Condition Figure 4-17. ...

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... I C™-bus serial interface fabricated using Samsung’s most advanced CMOS technology. It has been developed for low power and low voltage applications (1 5.5 V). One of its major feature is a hardware-based write protection circuit for the entire memory area. Hardware-based write protection is controlled by the state of the write-protect (WP) pin ...

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S524AD0XD1/D0XF1 SERIAL EEPROM SDA Start/Stop Logic WP SCL Slave Address Comparator 5-2 Control Logic Word Address Pointer Figure 5-1. S524AD0XD1/D0XF1 Block Diagram Row decoder D and ACK OUT DATA SHEET HV Generation Timing Control EEPROM Cell Array ...

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DATA SHEET Name Type A0, A1, A2 Input Input pins for device address selection. To configure a device address, these pins should be connected to the V These pins are internally pulled down – Ground pin. SS ...

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S524AD0XD1/D0XF1 SERIAL EEPROM A0, A1, A2, WP Figure 5-3. Pin Circuit Type 1 SDA 5-4 SCL Figure 5-4. Pin Circuit Type Noise Filter Figure 5-5. Pin Circuit Type 3 DATA SHEET Noise Filter Data Out Data In ...

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DATA SHEET FUNCTION DESCRIPTION 2 I C-BUS INTERFACE The S524AD0XD1/D0XF1 supports the I consists of a serial data line (SDA) and a serial clock line (SCL). The SDA and the SCL lines must be connected pull-up ...

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S524AD0XD1/D0XF1 SERIAL EEPROM 2 I C-BUS PROTOCOLS 2 Here are several rules for I C-bus transfers: — A new data transfer can be initiated only when the bus is currently not busy. — MSB is always transferred first in transmitting ...

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DATA SHEET Master SCL Line Data from Transmitter ACK from Receiver Figure 5-8. Acknowledge Response from Receiver Slave Address: After the master initiates a start condition, it must output the address of the device to be accessed. The most significant ...

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S524AD0XD1/D0XF1 SERIAL EEPROM BYTE WRITE OPERATION A write operation requires 2-byte word addresses, the first (high) word address and the second (low) word address byte write operation, the master transmits the slave address, the first word address, the ...

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DATA SHEET PAGE WRITE OPERATION The S524AD0XD1/D0XF1 can also perform 64-byte page write operation. A page write operation is initiated in the same way as a byte write operation. However, instead of finishing the write operation after the first data ...

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S524AD0XD1/D0XF1 SERIAL EEPROM POLLING FOR AN ACK SIGNAL When the master issues a stop condition to initiate a write cycle, the S524AD0XD1/D0XF1 starts an internal write cycle. The master can then immediately begin polling for an ACK from the slave ...

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DATA SHEET HARDWARE-BASED WRITE PROTECTION You can also write-protect the entire memory area of the S524AD0XD1/D0XF1. This write protection is controlled by the state of the Write Protect (WP) pin. When the WP pin is connected to V acknowledge slave ...

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S524AD0XD1/D0XF1 SERIAL EEPROM RANDOM ADDRESS BYTE READ OPERATION Using random read operations, the master can access any memory location at any time. Before it issues the W slave address with the R/ bit set to “1”, the master must first ...

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DATA SHEET SEQUENTIAL READ OPERATION Sequential read operations can be performed in two ways: current address sequential read operation, and random address sequential read operation. The first data is sent in either of the two ways, current address byte read ...

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S524AD0XD1/D0XF1 SERIAL EEPROM ELECTRICAL DATA ( Parameter Supply voltage Input voltage Output voltage Operating temperature Storage temperature Electrostatic discharge (T = – (Commercial), – ...

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DATA SHEET Table 5-3. D.C. Electrical Characteristics (Continued – (Commercial), – (Industrial Parameter Symbol C Input capacitance C Input/Output capacitance (T = – 25 ...

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S524AD0XD1/D0XF1 SERIAL EEPROM SCL t SU:STA SDA In SDA Out WP SCL SDA 8th Bit WORDn 5- HIGH t LOW t t HD:STA HD:DAT t AA (Protected) (Unprotected) Figure 5-16. Timing Diagram for Bus Operations ACK ...

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... The S524E0XH1 serial EEPROM has a 512K-bit (65,536 bytes) capacity, supporting the standard I serial interface fabricated using Samsung’s most advanced CMOS technology. It has been developed for low power and low voltage applications (1 5.5 V). One of its major feature is a hardware-based write protection circuit for the entire memory area ...

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S524AE0XH1 SERIAL EEPROM (Preliminary Spec) 6-2 NOTES DATA SHEET ...

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Packaging Information #8 #5 8-DIP-300 #1 #4 9.60 MAX 9.20 0.20 2.54 (0.79) 0.46 0.10 1.52 0.10 NOTE: Dimensions are in millimeters. Figure 7-1. 8-DIP-300 Package Dimensions Data Sheet 0-15 7-1 ...

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PACKAGING INFORMATION (0.56) 7 8-SOP-225 #1 #4 5.13 MAX 4.92 0.20 1.27 0.41 0.10 NOTE: Dimensions are in millimeters. Figure 7-2. 8-SOP-225 Package Dimensions 0-8 + 0.10 0.15 - 0.05 0.10 MAX DATA SHEET ...

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DATA SHEET NOTES 8-TSSOP- 3.10 MAX 0.65 + 0.05 0.25 - 0.06 Dimensions are in millimeters. Package dimensions conform to JEDEC MO-153-AA. Figure 7-3. 8-TSSOP Package Dimensions PACKAGING INFORMATION 0-8 + 0.10 0.125 - ...

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PACKAGING INFORMATION 7-4 NOTES DATA SHEET ...

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... The demonstration program which follows shows how the S524A40X21 serial EEPROM can be interfaced to the S3C8095/S3C72F5 microcontroller. Device S524A40X10/40X11 S524A40X20/40X21 S524A40X40/40X41 S524A60X81 S524A60X51 Interfacing S524A Series Serial EEPROM to the S3C8095/S3C72F5 Microcontroller Table 8-1. S524A Series (1 to 16K-bit) EEPROM Size Max Device Per Bus ...

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SERIAL EEPROM 20P 0.1 8 MHz 20P 20P 0.1 5 MHz 20P 8 P1.7 P1 Slave 1 RESET OUT A2 2 ...

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APPLICATION NOTE ;****************************************************************************************************************************** ;This program demonstrates how the S524A40X21 serial EEPROM can be interfaced to the S3C8095 ;microcontroller. This software includes random address byte read and byte write operation. ;If you use the 8 MHz crystal in Figure 8-1, SCL ...

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SERIAL EEPROM CP R2,#02 JR UGE,RxData CP R2,#01 JR UGE,ReStart ; LD R0,R14 INC R2 JR RD_TxStart ; ReStart OR P1,#11000000B NOP NOP NOP AND P1,#0FFh-(01<<SDA) NOP NOP NOP NOP AND P1,#0FFh-(01<<SCL R0,#0A1h INC R2 JR RD_TxStart ; ...

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APPLICATION NOTE GenIicStop CALL IICbus_Stop POP R2 POP R1 POP R0 RET ; RD_Data_1 OR P1,#01<<SDA CALL IIC_Clock_1Bit JP RD_Count8bit ; ; *************************************************************************** ;****************** Byte Write Operation ; Start Slave Addr.(A0) Word addr. ; *************************************************************************** Write1Byte: PUSH R0 PUSH R1 ...

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SERIAL EEPROM WriteData LD R0,R15 INC R2 JR WR_TxStart ; WR_Data_1 OR P1,#01<<SDA CALL IIC_Clock_1Bit JR WR_Count8bit ; CommuniFail AND P1,#0FFh–(01<<SCL) NOP NOP OR P1CONH,#01000000B JP GenIicStop TxStop JP GenIicStop IICbus_Start OR P1,#11000000B NOP NOP NOP AND P1,#0FFh–(01<<SDA) NOP NOP ...

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... APPLICATION NOTE ;********************************************************************************************************************************** ; This program demonstrates how the S524A40X21 serial EEPROM can be interfaced to the SAMSUNG S3C72F5 microcontroller. This software includes random address byte read and byte write operation you use the 5 MHz crystal oscillator, SCL frequency will be approximately 50 kHz ;********************************************************************************************************************************** ;*************************************************************************** ; Equation Table ;*************************************************************************** ...

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SERIAL EEPROM BTSF SDA_PORT JP CommuniFail BITR SCL_PORT CALL SdaOutMode CPSE Y,#2H JP NextR1 JP RxData NextR1 CPSE Y,#1H JP NextR2 JP ReStart NextR2 LD EA,ReadAddr INCS Y JP RD_TxStart ReStart BITS SDA_PORT BITS SCL_PORT NOP NOP NOP NOP NOP ...

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APPLICATION NOTE DataRotate ADC EA,EA BITR SCL_PORT NOP NOP NOP DECS Z JP RotateLoop LD ReadData,EA CALL SdaOutMode BITS SDA_PORT NOP NOP BITS SCL_PORT NOP NOP BITR SCL_PORT NOP GenlicStop CALL IICbus_Stop RET ; *************************************************************************** ;****************** Byte Write Operation ; ...

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SERIAL EEPROM NOP NOP NOP BTSF SDA_PORT JP CommuniFail BITR SCL_PORT CALL SdaOutMode CPSE Y,#2H JP NextW1 JP TxStop NextW1 CPSE Y,#1H JP NextW2 JP WriteData NextW2 LD EA,WriteAddr INCS Y JP WR_TxStart WriteData LD EA,WriteData INCS Y JP WR_TxStart ...

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APPLICATION NOTE IIC_Clock_1Bit BITS SCL_PORT NOP NOP NOP BITR SCL_PORT RET SdaInMode PUSH EA LD EA,PMG1_BUF AND A,#1110B LD PMG1_BUF,EA SMB 15 LD PMG1,EA SMB 0 POP EA RET SdaOutMode PUSH EA SMB 0 LD EA,PMG1_BUF OR A,#0001B LD PMG1_BUF,EA ...

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SERIAL EEPROM 8-12 NOTES APPLICATION NOTE ...

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DIP/SOP # (1) (2) ( (6) #1 (1) Operating Voltage 5.5 V (2) EEPROM ...

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MARKING INFORMATION 9-2 NOTES DATA SHEET ...

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... (1) (2) (1) Series Name 2 24 interface (2) Operation Voltage 5.5 V (3) Samsung's Internal Management Data (4) ROM Size 1 = 1K-bit 2 = 2K-bit 4 = 4K-bit 8 = 8K-bit 5 = 16K-bit 9 = 32K-bit B = 64K-bit D = 128K-bit F = 256K-bit H = 512K-bit Ordering Information (3) (4) (5) (6) (5) Write Protection ...

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ORDERING INFORMATION 10-2 NOTES DATA SHEET ...

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... New product development Replacement of an existing EEPROM If you are replacing an existing EEPROM, please indicate the former product name ( + + What are the main reasons you decided to use a Samsung EEPROM in your product? Please check all that apply. Price Development system Used same product before ...

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Serial EEPROM Selection Guide S524A40X10/40X20/40X40 S524A40X11/40X21/40X41/60X81/60X51 S524AB0X91/B0XB1 S524AD0XD1/D0XF1 S524AE0XH1 Packaging Information Application Note Marking Information Ordering Information ...

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