Z86E3312VEC Zilog, Inc., Z86E3312VEC Datasheet
Z86E3312VEC
Related parts for Z86E3312VEC
Z86E3312VEC Summary of contents
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FEATURES ROM RAM* Device (KB) (Bytes) Z86E33 4 237 Z86733 8 237 Z86E34 16 237 Z86E43 4 236 Z86743 8 236 Z86E44 16 236 Note: *General-Purpose Standard Temperature (V = 3.5V to 5.5V) CC Extended Temperature (V = 4.5V to ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers GENERAL DESCRIPTION (Continued) nals, and parallel I/O with or without handshake, and ad- dress/data bus for interfacing external memory. Notes: All signals with a preceding front slash, "/", are active Low. For example, B//W (WORD ...
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Zilog Z8 MCU AD 13- 0 Address Counter PGM + T est Mode Logic CLR CLK (P00) (P01) EPM /PGM P32 P02 /CE XT1 Figure 2. EPROM Programming Block Diagram DS97Z8X1500 ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers PIN IDENTIFICATION R//w 1 P25 P26 P27 P04 P05 P06 P14 P15 P07 DIP 40 - Pin VCC P16 P17 XTAL2 XTAL1 P31 P32 P33 P34 20 /AS Figure 3. 40-Pin DIP Pin Configuration Standard ...
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Zilog R//W Table 2. 44-Pin PLCC Pin Identification Pin # Symbol Function 1-2 GND Ground 3-4 P12-P13 Port 1, Pins 2,3 5 P03 Port 0, Pin 3 6-10 P20-P24 Port 2, Pins 0,1,2,3,4 In/Output 11 /DS Data Strobe 12 NC ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers PIN IDENTIFICATION (Continued) R//W Table 3. 44-Pin QFP Pin Identification Pin # Symbol Function 1-2 P05-P06 Port 0, Pins 5,6 3-4 P14-P15 Port 1, Pins 4,5 5 P07 Port 0, Pin 7 6-7 VCC Power ...
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Zilog 40-Pin DIP NC VCC /CE /OE EPM VPP Figure 6. 40-Pin DIP Pin Configuration EPROM Mode DS97Z8X1500 Table 4. 40-Pin DIP Package Pin ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers PIN IDENTIFICATION (Continued) Table 5. 44-Pin PLCC Pin Configuration EPROM Programming Mode Pin # Symbol Function 1-2 GND Ground 3 Connection 6-10 D0-D4 Data 0,1,2,3,4 11- Connection 14-16 D5-D7 Data 5,6,7 ...
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Zilog Table 6. 44-Pin QFP Pin Identification EPROM Programming Mode Pin # Symbol Function 1 Connection 6-7 V Power Supply CC 8- Connection 11 /CE Chip Select 12 /OE Output Enable 13 EPM EPROM Prog. Mode ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers PIN IDENTIFICATION (Continued) 1 P25 P26 P27 P04 P05 P06 P07 28-Pin VCC DIP/SOIC XTAL2 XTAL1 P31 P32 P33 14 P34 Figure 9. Standard Mode 28-Pin DIP/SOIC Pin Configuration Table 7. 28-Pin DIP/SOIC/PLCC Pin Identification ...
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Zilog 28-Pin VCC DIP/SOIC NC /CE /OE EPM VPP 14 NC Figure 11. EPROM Programming Mode 28-Pin DIP/SOIC Pin Configuration XXX NC XXX NC XXX NC 28-Pin PLCC VCC ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers ABSOLUTE MAXIMUM RATINGS Parameter Ambient Temperature under Bias Storage Temperature Voltage on any Pin with Respect to V Voltage on V Pin with Respect Voltage on XTAL1, P32, P33 and /RESET Pins ...
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Zilog CAPACITANCE T = 25° GND = 0V 1.0 MHz; unmeasured pins returned to GND Parameter Min Input capacitance 0 Output capacitance 0 I/O capacitance 0 DC ELECTRICAL CHARACTERISTICS Sym Parameter V Clock Input ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers DC ELECTRICAL CHARACTERISTICS (Continued) Sym Parameter I Reset Input Current IR I Supply Current CC I Standby Current CC1 Halt Mode I Standby Current CC2 Stop Mode I Auto Latch ALL Low Current I Auto ...
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Zilog V Sym Parameter Note [3] V Clock Input High 4.5V CH Voltage 5.5V V Clock Input Low 4.5V CL Voltage 5.5V V Input High Voltage 4.5V IH 5.5V V Input Low Voltage 4.5V IL 5.5V V Output High 4.5V ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers DC ELECTRICAL CHARACTERISTICS (Continued) V Sym Parameter Note [3] I Auto Latch Low 4.5V ALL Current 5.5V I Auto Latch High 4.5V ALH Current 5.5V T Power On Reset 4.5V POR 5.5V V Auto Reset ...
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Zilog R//W , /DM 12 Port 0 18 Port 1 1 /AS 4 /DS (Read) Port1 /DS (W rite) Figure 14. External I/O or Memory Read/Write Timing DS97Z8X1500 ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers DC ELECTRICAL CHARACTERISTICS (Continued) No Symbol Parameter 1 TdA(AS) Address Valid to /AS Rise Delay 2 TdAS(A) /AS Rise to Address Float Delay 3 TdAS(DR) /AS Rise to Read Data Req’d Valid 4 TwAS /AS ...
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Zilog No Symbol Parameter 1 TdA(AS) Address Valid to /AS Rise Delay 2 TdAS(A) /AS Rise to Address Float Delay 3 TdAS(DR) /AS Rise to Read Data Req’d Valid 4 TwAS /AS Low Width 5 TdAS(DS) Address Float to /DS ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers DC ELECTRICAL CHARACTERISTICS (Continued) Clock TIN 4 IRQN 8 Clock Setup Stop Mode Recovery Source Figure 15. Additional Timing Diagram P R ...
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Zilog Additional Timing Table (Divide-By-One Mode) No Symbol Parameter 1 TpC Input Clock Period 2 TrC,TfC Clock Input Rise & Fall Times 3 TwC Input Clock Width 4 TwTinL Timer Input Low Width 5 TwTinH Timer Input High Width 6 ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers Additional Timing Table (Divide-By-One Mode) No Symbol Parameter 1 TpC Input Clock Period 2 TrC,TfC Clock Input Rise & Fall Times 3 TwC Input Clock Width 4 TwTinL Timer Input Low Width 5 TwTinH Timer ...
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Zilog Handshake Timing Diagrams Data In Valid Data In 1 /DA V (Input) RDY (Output) Data Out 7 /DAV (Output) RDY (Input) DS97Z8X1500 2 3 Delayed DAV 4 Figure 16. Input Handshake Timing Data Out Valid Figure ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers Additional Timing Table (Divide by Two Mode) No Symbol Parameter 1 TpC Input Clock Period 2 TrC,TfC Clock Input Rise & Fall Times 3 TwC Input Clock Width 4 TwTinL Timer Input Low Width 5 ...
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Zilog Additional Timing Table (Divide by Two Mode) No Symbol Parameter 1 TpC Input Clock Period 2 TrC,TfC Clock Input Rise & Fall Times 3 TwC Input Clock Width 4 TwTinL Timer Input Low Width 5 TwTinH Timer Input High ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers PIN FUNCTIONS EPROM Programming Mode D7-D0 Data Bus. The data can be read from or written to external memory through the data bus. V Power Supply. This pin must supply 5V during the CC EPROM ...
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Zilog Port 0 (P07-P00). Port 8-bit, bidirectional, CMOS- compatible I/O port. These eight I/O lines can be config- ured under software control as a nibble I/O port address port for interfacing external memory. The ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers PIN FUNCTIONS (Continued) Port 1 (P17-P10). Port 8-bit, bidirectional, CMOS- compatible port with multiplexed Address (A7-A0) and Data (D7-D0) ports. These eight I/O lines can be pro- grammed as inputs or outputs ...
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Zilog Port 2 (P27-P20). Port 8-bit, bidirectional, CMOS- compatible I/O port. These eight I/O lines can be config- ured under software control as an input or output, indepen- dently. All input buffers are Schmitt-triggered. Bits pro- grammed ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers PIN FUNCTIONS (Continued) Port 3 (P37-P30). Port 8-bit, CMOS-compatible port with four fixed inputs (P33-P30) and four fixed outputs (P37-P34). These eight lines can be configured by soft- ware for interrupt and ...
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Zilog P30 P31 (AN1 P32 (AN2) + P33 (REF) - From Stop Mode Recovery Source DS97Z8X1500 MCU Port 3 (I/O or Control) Auto Latch R 500 K R247 = P3M 1 = Analog Digital DIG. ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers PIN FUNCTIONS (Continued) Pin I/O CTC1 P30 IN P31 P32 IN P33 IN P34 OUT P35 OUT P36 OUT T OUT P37 OUT Comparator Inputs. Port 3, P31, and P32, each have ...
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Zilog FUNCTIONAL DESCRIPTION The MCU incorporates the following special functions to enhance the standard Z8 architecture to provide the user with increased design flexibility. RESET. The device is reset in one of three ways: 1. Power-On Reset 2. Watch-Dog Timer ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers FUNCTIONAL DESCRIPTION (Continued) EPROM Protect. When in ROM Protect Mode, and exe- cuting out of External Program Memory, instructions LDC, LDCI, LDE, and LDEI cannot read Internal Program Mem- ory. When in EPROM Protect Mode ...
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Zilog Register File. The register file consists of three I/O port registers, 236/125 general-purpose registers, 15 control and status registers, and three system configuration regis- ters in the expanded register group. The instructions can access registers directly or indirectly through ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers FUNCTIONAL DESCRIPTION (Continued The upper nibble of the register file address provided by the register pointer specifies the active working-register group. FF Register Group F F0 ...
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Zilog REGISTER POINTER Working Register Expanded Register Group Pointer Z8 Reg. File %FF %FO %7F %0F %00 Notes Unknown † For ROMless reset condition: "10110110" * Will not be reset with ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers FUNCTIONAL DESCRIPTION (Continued) General-Purpose Registers (GPR). These registers are undefined after the device is powered up. The registers keep their last value after any reset, as long as the reset occurs in the V voltage-specified ...
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Zilog OSC D1 (SMR) ÷ (SMR) ÷ 16 Internal Clock External Clock Clock Logic ÷4 Internal Clock Gated Clock Triggered Clock TIN P31 DS97Z8X1500 Internal Data Bus Write Write PRE0 Initial Value Register 6-Bit ÷4 Down Counter 6-Bit ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers FUNCTIONAL DESCRIPTION (Continued) Interrupts. The MCU has six different interrupts from six different sources. The interrupts are maskable and priori- tized (Figure 28). The six sources are divided as follows: four sources are claimed by ...
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Zilog When more than one interrupt is pending, priorities are re- solved by a programmable priority encoder that is con- trolled by the Interrupt Priority Register (IPR). An interrupt machine cycle is activated when an interrupt request is granted. Thus, ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers FUNCTIONAL DESCRIPTION (Continued) Power-On Reset (POR). A timer circuit clocked by a ded- icated on-board RC oscillator is used for the Power-On Re- set (POR) timer function. The POR timer allows V the oscillator circuit ...
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Zilog Comparator Output Port 3 (D0). Bit 0 controls the com- parator output in Port 3. A "1" in this location brings the comparator outputs to P34 and P37, and a "0" releases the Port to its standard I/O configuration. ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers FUNCTIONAL DESCRIPTION (Continued) SMR ( Default setting after RESET. ** Default setting after RESET and STOP-Mode Recovery. (Write-Only Except Bit D7, Which is Read-Only) 44 ...
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Zilog SCLK/TCLK Divide-by-16 Select (D0). This bit of the SMR controls a divide-by-16 prescaler of SCLK/TCLK. The purpose of this control is to selectively reduce device power consumption during normal processor execution (SCLK control) and/or HALT mode (where TCLK sources ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers FUNCTIONAL DESCRIPTION (Continued) Table 12. Stop-Mode Recovery Source SMR Source selection POR recovery only P30 transition P31 transition (Not in analog mode) 0 ...
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Zilog Permanent WDT. When this feature is enabled, the WDT is enabled after reset and will operate in Run and Halt Mode. The control bits in the WDTMR do not affect the WDT operation. If the clock source of the ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers /Reset 4 Clock WDT Select (WDTMR) CLK Source Select (WDTMR) XTAL + VDD VLV - /WDT From Stop Mode Recovery Source Stop Delay Select (SMR) 48 /Clear 18 Clock RESET Filter Generator CLK WDT TAP ...
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Zilog Auto Reset Voltage. An on-board Voltage Comparator checks that the required level to ensure correct CC 3.7 VCC (Volts) 3.5 3.3 3.1 2.9 2.7 2.5 2.3 -60 DS97Z8X1500 operation of the device. Reset is globally driven ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers Z8 CONTROL REGISTER DIAGRAMS PCON (FH) 00H Comparator Output Port 3 0 P34, P37 Standard* 1 P34, P37 Comparator Output 0 Port 1 Open-Drain 1 Port 1 ...
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Zilog R241 TMR Default After Reset = 00H Figure 41. Timer Mode Register F1H: Read/Write R242 Figure 42. Counter/Timer 1 Register F2H: Read/Write ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers Z8 CONTROL REGISTER DIAGRAMS (Continued) R246 P2M Default After Reset Figure 46. Port 2 Mode Register F6H: Write Only R247 P3M ...
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Zilog R250 IRQ Default After Reset = 00H Figure 50. Interrupt Request Register FAH: Read/Write R251 IMR † This option must be selected when ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers PACKAGE INFORMATION 54 Figure 56. 40-Pin DIP Package Diagram Figure 57. 44-Pin PLCC Package Diagram Zilog DS97Z8X1500 ...
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Zilog DS97Z8X1500 Figure 58. 44-Pin QFP Package Diagram Figure 59. 28-Pin DIP Package Diagram Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers 55 1 ...
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Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers PACKAGE INFORMATION (Continued) 56 Figure 60. 28-Pin SOIC Package Diagram Figure 61. 28-Pin PLCC Package Diagram Zilog DS97Z8X1500 ...
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... Example: Z 86E43 DS97Z8X1500 44-Pin QFP Z86E4312FSC Z86E4312FEC Z8674312FSC Z8674312FEC Z86E4412FSC Z86E4412FEC 28-Pin PLCC Z86E3312VSC Z86E3312VEC Z8673312VSC Z8673312VEC Z86E3412VSC Z86E3412VEC Speed MHz Environmental C = Plastic Standard is a Z8E43, 12 MHz, DIP, 0° to +70°C, Plastic Standard Flow Environmental Flow Temperature Package ...
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... Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers © 1997 by Zilog, Inc. All rights reserved. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of Zilog, Inc. The information in this document is subject to change without notice. Devices sold by Zilog, Inc. are covered by warranty and patent indemnification provisions appearing in Zilog, Inc ...