HM5164805TT-5 Renesas Electronics Corporation., HM5164805TT-5 Datasheet

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HM5164805TT-5

Manufacturer Part Number
HM5164805TT-5
Description
64 M EDO DRAM (8-Mword x 8-bit) 8 k Refresh/4 k Refresh
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
HM5164805TT-5
Manufacturer:
HIT
Quantity:
1 000
Description
The Hitachi HM5164805 Series, HM5165805 Series are 64M-bit dynamic RAMs organized as 8,388,608-
word
technology. HM5164805 Series, HM5165805 Series offer Extended Data Out (EDO) Page Mode as a
high speed access mode. They have the package variation of standard 32-pin plastic SOJ and standard
32-pin plastic TSOPII.
Features
Single 3.3 V supply: 3.3 V ± 0.3 V
Access time: 50 ns/60 ns (max)
Power dissipation
EDO page mode capability
Refresh cycles
Active: 414 mW/378 mW (max) (HM5164805 Series)
Standby : 1.8 mW (max) (CMOS interface)
#$
8192 cycles
4096 cycles
: 486 mW/414 mW (max) (HM5165805 Series)
: 0.54 mW (max) (L-version)
/128 ms (HM5164805L) (L-version)
/128 ms (HM5165805L) (L-version)
8-bit. They have realized high performance and low power by employing CMOS process
-only refresh
64 M EDO DRAM (8-Mword
/64 ms (HM5164805)
/64 ms (HM5165805)
HM5164805 Series
HM5165805 Series
8 k Refresh/4 k Refresh
8-bit)
ADE-203-808B (Z)
Feb. 27, 1998
Rev. 1.0

Related parts for HM5164805TT-5

HM5164805TT-5 Summary of contents

Page 1

HM5164805 Series HM5165805 Series 64 M EDO DRAM (8-Mword Description The Hitachi HM5164805 Series, HM5165805 Series are 64M-bit dynamic RAMs organized as 8,388,608- word 8-bit. They have realized high performance and low power by employing CMOS process technology. HM5164805 Series, ...

Page 2

... Hidden refresh Self refresh (L-version) Battery backup operation (L-version) Ordering Information Type No. HM5164805J-5 HM5164805J-6 HM5164805LJ-5 HM5164805LJ-6 HM5165805J-5 HM5165805J-6 HM5165805LJ-5 HM5165805LJ-6 HM5164805TT-5 HM5164805TT-6 HM5164805LTT-5 HM5164805LTT-6 HM5165805TT-5 HM5165805TT-6 HM5165805LTT-5 HM5165805LTT-6 2 Access time Package 50 ns 400-mil 32-pin plastic SOJ 60 ns (CP-32DC ...

Page 3

Pin Arrangement (HM5164805 Series) 32-pin SOJ RAS ...

Page 4

HM5164805 Series, HM5165805 Series Pin Arrangement (HM5165805 Series) 32-pin SOJ RAS ...

Page 5

Block Diagram (HM5164805 Series) RAS A0 A1 Column • address to • buffers • A9 • • • Row address buffers A10 to A12 HM5164805 Series, HM5165805 Series CAS WE OE Timing and control Column decoder 8M array 8M array ...

Page 6

HM5164805 Series, HM5165805 Series Block Diagram (HM5165805 Series) RAS A0 A1 Column • address to • buffers • A10 • • • Row address buffers A11 6 CAS WE OE Timing and control Column decoder 8M array 8M array 8M ...

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Operation Table 5$6 5$6 &$6 &$ Notes (inactive), ...

Page 8

HM5164805 Series, HM5165805 Series DC Characteristics (HM5164805 Series) Parameter Symbol Min 1, 2 Operating current CC1 Standby current I CC2 Standby current I CC2 (L-version) 5$6 2 -only refresh current* I CC3 1 Standby current* I CC5 &$6 ...

Page 9

DC Characteristics (HM5165805 Series) Parameter Symbol Min 1, 2 Operating current CC1 Standby current I CC2 Standby current I CC2 (L-version) 5$6 2 -only refresh current* I CC3 1 Standby current* I CC5 &$6 5$6 -before- refresh I ...

Page 10

HM5164805 Series, HM5165805 Series Capacitance (Ta = 25_C 3.3 V ± 0 Parameter Input capacitance (Address) Input capacitance (Clocks) Output capacitance (Data-in, Data-out) Notes : 1. Capacitance measured with Boonton Meter or effective capacitance measuring method. ...

Page 11

AC Characteristics ( +70_C, V Test Conditions Input rise and fall time Input pulse levels Input timing reference levels: 0.8 V, 2.0 V Output timing reference levels: 0.8 ...

Page 12

HM5164805 Series, HM5165805 Series Read Cycle Parameter 5$6 Access time from &$6 Access time from Access time from address 2( Access time from Read command setup time &$6 Read command hold time to 5$6 Read command hold time from 5$6 ...

Page 13

Write Cycle Parameter Write command setup time Write command hold time Write command pulse width 5$6 Write command to lead time &$6 Write command to lead time Data-in setup time Data-in hold time Read-Modify-Write Cycle Parameter Read-modify-write cycle time 5$6 ...

Page 14

HM5164805 Series, HM5165805 Series EDO Page Mode Cycle Parameter EDO page mode cycle time 5$6 EDO page mode pulse width &$6 Access time from precharge 5$6 &$6 hold time from precharge &$6 Output data hold time from low &$6 2( ...

Page 15

Self Refresh Mode (L-version) Parameter 5$6 pulse width (self refresh) 5$6 precharge time (self refresh) &$6 hold time (self refresh) Notes measurements assume initial pause of 200 µs is required after power up followed by ...

Page 16

HM5164805 Series, HM5165805 Series 20. t (min) can be achieved during a series of EDO page mode write cycles or EDO page mode HPC read cycles. If both write and read operation are mixed in a EDO page mode page ...

Page 17

Timing Waveforms* Read Cycle RAS t T CAS t RAD t ASR t RAH Address Row WE Din OE Dout HM5164805 Series, HM5165805 Series RAS t t CSH CRP t t RCD RSH t CAS t ...

Page 18

HM5164805 Series, HM5165805 Series Early Write Cycle RAS CAS t t ASR RAH Row Address WE Din Dout RAS t t CSH CRP t RCD RSH t CAS t t ASC CAH Column ...

Page 19

Delayed Write Cycle* RAS t RCD t T CAS t t RAH ASR Row Address WE Din OE Dout HM5164805 Series, HM5165805 Series RAS t CSH t RSH t CAS t t ASC CAH Column t ...

Page 20

HM5164805 Series, HM5165805 Series 18 Read-Modify-Write Cycle* RAS t T CAS t RAD t t RAH ASR Address Row WE Din OE Dout 20 t RWC t RAS t t RCD CAS t t ASC CAH Column t t CWL ...

Page 21

Refresh Cycle RAS t t CRP CAS t ASR Address t OFR t OFF Dout HM5164805 Series, HM5165805 Series RAS RPC t RAH Row High-Z t CRP 21 ...

Page 22

HM5164805 Series, HM5165805 Series $ #$ $ #$ -Before- Refresh Cycle t RP RAS RPC CSR CAS t WRP WE Address t OFR t OFF Dout RAS ...

Page 23

Hidden Refresh Cycle t t RAS RAS RCD CAS t RAD RAH ASR ASC Address Row Column t RCS WE t DZC Din t DZO OE t RAC Dout HM5164805 Series, HM5165805 Series t ...

Page 24

HM5164805 Series, HM5165805 Series EDO Page Mode Read Cycle (1) RAS CSH t CAS CAS t RCHR t t RCS CAH t RAH ASC ASR Address Row Column 1 t CAL t DZC ...

Page 25

EDO Page Mode Read Cycle (2) RAS CSH t CAS CAS t RCS CAH RAH ASC t ASR Address Row Column 1 t CAL t DZC High-Z Din t DZO OE t OEA ...

Page 26

HM5164805 Series, HM5165805 Series EDO Page Mode Early Write Cycle RAS CSH t RCD CAS ASR RAH ASC Address Row Column 1 t WCS Din 1 Din Dout 26 t RASP ...

Page 27

EDO Page Mode Delayed Write Cycle* RAS CSH t RCD CAS t RAD t t ASR ASC t t RAH CAH Row Column 1 Address t RCS WE t DZC Din t t OED DZO OE t ...

Page 28

HM5164805 Series, HM5165805 Series EDO Page Mode Read-Modify-Write Cycle* RAS RCD CAS t RAD t t ASR ASC t t RAH CAH Row Column 1 Address t RWD t AWD t CWD WE t RCS t ...

Page 29

EDO Page Mode Mix Cycle (1)* RAS CAS CAS t CSH t RCD WCS WCH WE t ASC t t CAH t RAH ASR Address Row Column Din ...

Page 30

HM5164805 Series, HM5165805 Series 20 EDO Page Mode Mix Cycle (2) * RAS CSH t CAS CAS t RCD t RCHR t t RCS ASC CAH t t RAH ASR Address Row Column 1 ...

Page 31

Self Refresh Cycle (L-version RAS RPC t t CSR CP CAS t WRP WE t OFR t OFF Dout HM5164805 Series, HM5165805 Series t RASS t WRH High-Z t RPS t ...

Page 32

HM5164805 Series, HM5165805 Series Package Dimensions HM5164805J/ LJ Series HM5165805J/ LJ Series (CP-32DC) 20.95 21.38 Max 32 1 0.74 1.165 Max 0.43 0.10 0.41 0.08 0.10 Dimension including the plating thickness Base material dimension 9.40 1.27 Hitachi ...

Page 33

... HM5164805TT/LTT Series HM5165805TT/LTT Series (TTP-32DC) 20.95 21.35 Max 32 1 1.27 0.42 0.08 0.21 M 0.40 0.06 1.15 Max 0.10 Dimension including the plating thickness Base material dimension HM5164805 Series, HM5165805 Series 17 16 11.76 0.20 0 – 5 Hitachi Code JEDEC EIAJ Weight (reference value) Unit: mm 0.80 0.50 0.10 TTP-32DC Conforms — 0. ...

Page 34

HM5164805 Series, HM5165805 Series When using this document, keep the following in mind: 1. This document may, wholly or partially, be subject to change without notice. 2. All rights are reserved: No one is permitted to reproduce or duplicate, in ...

Page 35

Revision Record Rev. Date Contents of Modification 0.0 Jul. 23, 1997 Initial issue 0.1 Nov. 1997 Change of Subtitle Timing waveforms Correct eroors of EDO mix cycle (1) 1.0 Feb. 27, 1998 Deletion of Preliminary HM5164805 Series, HM5165805 Series Drawn ...

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