MS7201AL-50NC Mosel-Vitelic, MS7201AL-50NC Datasheet

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MS7201AL-50NC

Manufacturer Part Number
MS7201AL-50NC
Description
50ns; 256 x 9, 512 x9, 1K x 9 CMOS FIFO
Manufacturer
Mosel-Vitelic
Datasheet

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Part Number:
MS7201AL-50NC
Quantity:
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MOSEL VITELIC
Features
MS7200L/01AL/02AL Rev. 1.0 January 1995
First-In/First-Out static RAM based dual port
memory
Three densities in a x9 configuration
Low power versions
Includes empty, full, and half full status flags
Direct replacement for industry standard
Mostek and IDT
Ultra high-speed 30 MHz FIFOs available with
33 ns cycle times.
Fully expandable in both depth and width
Simultaneous and asynchronous read and write
Auto retransmit capability
TTL compatible interface, single 5V ± 10%
power supply
Available in 28 pin 300 mil and 600 mil plastic
DIP, 32 Pin PLCC and 330 mil SOG
NC
D 2
D
D
FF
Q
Q
Q
XI
Pin Configurations
1
0
0
1
2
GND
5
8
7
8
9
10
11
14
13
Q2
Q3
Q8
D8
D3
D2
D1
D0
FF
Q0
Q1
32-PIN PLCC
W
XI
28-PIN PDIP
14
4 3 2 1 32 31 30
15 16 17 18 19 20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
32 Pin PLCC
Top View
300 mil
600 mil
330 mil
SOG
DIP
&
MS7200L/7201AL/7202AL
256 x 9, 512 x 9, 1K x 9
CMOS FIFO
28
27
26
25
24
23
22
21
20
19
18
17
16
15
29
28
27
26
25
24
23
22
21
V
D4
D5
D6
D7
FL / RT
RS
EF
XO / HF
Q7
Q6
Q5
Q4
R
CC
D 6
D 7
NC
FL / RT
RS
EF
XO / HF
Q 7
Q 6
XI
W
R
1
Descriptions
static RAM based CMOS First-In/First-Out (FIFO)
memories organized in nine-bit wide words. The
devices are configured so that data is read out in
the same sequential order that it was written in.
Additional expansion logic is provided to allow for
unlimited expansion of both word size and depth.
by independent Read and Write pointers with no
external addressing needed. Read and write
operations are fully asynchronous and may occur
simultaneously, even with the device operating at
full speed. Status flags are provided for full, empty,
and half-full conditions to eliminate data underflow
and overflow. The x9 architecture provides an
additional bit which may be used as a parity or
control bit. In addition, the devices offer a retransmit
capability which resets the Read pointer and allows
for retransmission from the beginning of the data.
range of frequencies from 10 to 30 MHz (33 - 100 ns
cycle times). A low power version with a 500µA
power down supply current is available. They are
manufactured on Mosel-Vitelic’s high performance
1.2µ CMOS process and operate from a single 5V
power supply.
CONTROL
CONTROL
The MS7200L/7201AL/7202AL are dual-port
The dual-port RAM array is internally sequenced
The MS7200L/7201AL/7202AL are available in a
WRITE
READ
EXPANSION
LOGIC
LOGIC
FLAG
Block Diagram
POINTER
WRITE
MS7200L/7201AL/7202AL
BUFFERS
THREE
STATE
DATA OUTPUTS (Q0-Q8)
DATA INPUTS (Q0-Q8)
ARRAY
256x9
512x9
1Kx9
RAM
EF
HF
FF
XO
POINTER
RESET
LOGIC
READ
RS
FL / RT

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MS7201AL-50NC Summary of contents

Page 1

... The MS7200L/7201AL/7202AL are available in a range of frequencies from MHz (33 - 100 ns cycle times). A low power version with a 500µA power down supply current is available. They are manufactured on Mosel-Vitelic’s high performance 1.2µ CMOS process and operate from a single 5V power supply. CC WRITE ...

Page 2

MOSEL VITELIC Signal Descriptions INPUTS: Data These data inputs accept 9-bit data words for sequential storage in the FIFO during write operations. CONTROLS: Reset (RS) The reset input is active LOW. When asserted, ...

Page 3

MOSEL VITELIC (1) Absolute Maximum Ratings Symbol Parameter Condition V Terminal Voltage with -0.5 to +7.0 TERM Repect to GND T Temperature Under Bias -10 to +125 BIAS T Storage Temperature -60 to +150 STG P Power Dissipation T I ...

Page 4

... MS7200L-80 MS7201AL-80 MS7202AL-80 Max. Min. Max. Units MHz -- 100 -- 100 -- ...

Page 5

MOSEL VITELIC AC Test Conditions Input Pulse Levels 0V~ 3.0V Input Rise and Fall Times 5 ns Timing Reference Level 1.5V AC Test Loads and Waveforms R1 480 5V OUTPUT R2 30pF 255 INCLUDING JIG AND SCOPE Figure 1a Equivalent ...

Page 6

MOSEL VITELIC Timing Waveforms ASYNCHRONOUS WRITE OPERATION t WPW W D0-D8 RETRANSMIT EMPTY FLAG TIMING MS7200L/01AL/02AL Rev. 1.0 January 1995 WRITE WRITE DATA VALID ...

Page 7

MOSEL VITELIC Timing Waveforms FULL FLAG TIMING HALF-FULL FLAG TIMING HALF-FULL OR LESS FULL FLAG FROM LAST WRITE TO FIRST READ LAST WRITE WFF FF MS7200L/01AL/02AL Rev. 1.0 January 1995 t ...

Page 8

MOSEL VITELIC Timing Waveforms EMPTY FLAG FROM LAST READ TO FIRST WRITE LAST READ REF DATA VALID OUT READ DATA FLOW-THROUGH MODE DATA DATA OUT WRITE DATA FLOW-THROUGH MODE R ...

Page 9

... XIS FIRST PHYSICAL READ FROM LAST PHYSICAL LOCATION t t XOL XOH Single Device Mode When one MS7201AL is used standalone in Single Device Mode, the Expansion In (XI) control input pin must be grounded. See Figure 3. HALF FULL FLAG (HF) WRITE READ DATA IN DATA OUT MS 7201A ...

Page 10

MOSEL VITELIC Width Expansion Mode Word width may be expanded by connecting the corresponding control input signals of multiple devices together. The EMPTY, HALF FULL and FULL FLAGS (EE, HF and FF) can be detected by DATA IN (D) 9 ...

Page 11

... MS7201AL-25JC MS7202AL-25JC 25 MS7200-25FC MS7201AL-25FC MS7202AL-25FC 35 MS7201AL-35PC MS7202AL-35PC 35 MS7200-35NC MS7201AL-35NC MS7202AL-35NC 35 MS7200-35JC MS7201AL-35JC MS7202AL-35JC 35 MS7200-35FC MS7201AL-35FC MS7202AL-35FC 50 MS7201AL-50PC MS7202AL-50PC 50 MS7200-50NC MS7201AL-50NC MS7202AL-50NC 50 MS7200-50JC MS7201AL-50JC MS7202AL-50JC 50 MS7200-50FC MS7201AL-50FC MS7202AL-50FC 80 MS7201AL-80PC MS7202AL-80PC 80 MS7200-80NC MS7201AL-80NC MS7202AL-80NC 80 MS7200-80JC MS7201AL-80JC MS7202AL-80JC 80 MS7200-80FC MS7201AL-80FC MS7202AL-80FC MS7200L/01AL/02AL Rev. 1.0 January 1995 Modes may be used in combination with Bidirectional Mode ...

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