AV3169 ETC-unknow, AV3169 Datasheet
AV3169
Related parts for AV3169
AV3169 Summary of contents
Page 1
...
Page 2
...
Page 3
VIDEO PERFORMANCE Item 1 Attenuation of Luminance Signal 2 Attenuation of NTSC Color Difference Signal 3 Attenuation of PAL Color Difference Sig- nal 4 Attenuation of Component Color Differ- ence Signal 5 Luma SNR 6 Chroma SNR 7 Differential Gain ...
Page 4
AV3168 Detailed Block Diagram VSYN EAV MONO 2 Y PD<7:0> SDA Serial I/F SCL CK27 CLOCK ACK GEN. GCK 70 69 XOUT XIN GOUT0 MSTR HSYN PDEN FMT Video Timing ...
Page 5
PIN DESCRIPTIONS VREF 40 VSS 41 42 VSS GOUT0 43 GOUT1 44 XOUT 1 2 XIN MSTR 3 VSS 4 VDD 5 RST 6 AV3168/69 5-24 28 PDEN 27 CPNT 26 VSS 25 ACK 24 SCL 23 SDA 22 VDD ...
Page 6
PIN DESCRIPTIONS Pin Name Pin # Type DIGITAL VIDEO INPUT PD<7 -0> 11-16 I 18-19 HSYN 21 I/O VSYN 20 I/O VIDEO CONTROL SIGNALS MSTR 3 I CPNT 27 I PDEN 28 1 VIDEO ANALOG OUTPUT, REFERENCE AND COMPENSATION CVBS ...
Page 7
PIN DESCRIPTIONS (Continued) Pin Name Pin # Type VREF 40 I/O IREF 39 I COMP 38 I BIAS 37 I/O SERIALCONTRL BUS SCL 24 I SDA 23 I/0 CLOCK SIGNALS GCK 7 O CK27 9 O ACK ...
Page 8
PIN DESCRIPTIONS (Continued) Pin Name Pin # Type XIN 2 I XOUT 1 O MISCELLANEOUS SIGNALS RST 6 I GOUT1 44 I/O GOUT0 43 I/O POWER AND GROUND VDD 10, 22, 5 +5V VSS 8, 17, 26, GND 30, 34, ...
Page 9
VIDEO TIMING GENERATION The video encoder can operate as a master or a slave in the timing generation. In the master mode, the video encoder outputs SYNC signals. In the slave mode, the internal timing is lock to the external ...
Page 10
VSYN 309 310 311 312 VSYN 621 622 623 624 VSYN 309 310 311 312 VSYN AV3168/69 PAL VERTICAL INTERVAL TIMING Blanked Field 1 & 5 625 Blanked Field 2 &6 313 314 ...
Page 11
LUMINANCE PROCESSING The luminance, Y, are interpolated to 27 Mhz sampling rate through a multi-tap linear poly-phase filter. The filter frequency response is flat from MHz. Contrast and Brightness control are provided for minor adjustment only. . ...
Page 12
CHROMINANCE PROCESSING The Cb and Cr signals are filtered and interpolated to 27 Mhz. The filter has 3 bandwidth: 0.675, 1 MHz. The filter bandwidth can be either auto select or user select via control register CREG<7:6>. CHROMINANCE ...
Page 13
CLOCK FREQUENCY CONTROL The system clock, GCK, output frequency is determined by the state of two general purpose output pins (GOUT0 and GOUT1) while the RST pin is low. The output frequencies are. The ACK outputs 384 times 40.5, 48 ...
Page 14
... SCH 5 CR0[1] PALMN 6 CR0[0] FMT0 AV3168/ bus Address = 0X65. (I2C bus Address = 0x64 for AV3169 ). The (Address: 0x0, Default Value: 0x00) Mnemonic #bits 2 Chroma Filter Selection 00: Automatic bandwidth assignment based on 01: 0.675 MHz bandwidth 10: 1.36 MHz bandwidth 11: 2 MHz bandwidth 2 Component Output Selection. Valid only If pin 27 CPNT pin is ‘ ...
Page 15
Control Register 1, CR1 (Address: 0x01, Default Value: 0x00) Register Item Mnemonic Bits 1 CR1[7] VBIOFF 2 CR1[6:5] CCC 3 CR1[4] YDLY 4 CR1[3:2] BGT 5 CR1[1:0] CON Control Register 2, CR2 (Address: 0x02, Default Value: 0x00) Register Item Mnemonic ...
Page 16
Control Register 2, CR2 (Address: 0x02, Default Value: 0x00) Register Item Mnemonic Bits 4 CR2[4] GOUTEN 5 CR2[3:2] GOUT[1:0] 6 CR2[1:0] K[1:0] Extended Closed Caption Register 0 Register Mnemonic ECC[15:8] ECC[15:8] Extended Closed Caption Register 1 Register Mnemonic ECC[7:0] ECC[7:0] ...
Page 17
I C Bus Control Register write example Bus Control Register write example: C Bus Control Register write example: Start CA6 CA0 SDA Start Start CA6 CA6 SDA SDA 1 1 SCL ...
Page 18
APPLICATION CIRCUIT De-coupling and Analog Connections +5V Connector 27.0000 MHz 12~22pF 12~22pF + 100 ohm GCK Selection Reconstruction Filter (VLPF) for The Double End 75 Ohm Termination Video Output ...
Page 19
DIGITAL VIDEO INPUT PORT TIMING DIAGRAM . CK27 PD<7:0> . CK27 HSYN VSYN Figure 2: Horizontal Sync and Vertical Sync Signals tBUF SDA tHD;STA SCL AV3168/69 tck tck tpd tpd su hd Figure ...
Page 20
ABSOLUTE MAXIMUM RATINGS Symbol V Power Supply Voltage (Measured to GND Digital Input Applied Voltage i A Digital Input Forced Current i V Digital Output Applied Voltage o A Digital Output Forced Current o TDsc Digital Short Circuit ...
Page 21
RECOMMENDED OPERATING CONDITIONS Symbol Characteristics V Power supply voltage DD V Reference voltage ref Iref Reference current R Analog output load L T Ambient operating temperature range a ELECTRICAL CHRACTERISTICS Symbol Supply I Total Power Supply Current, Analog + Digital ...
Page 22
Symbol Characteristics t ck CK27 Pulse Width, LOW 27 L Video Bus Master Mode Timing t pd Digital Pixel Data P<7:0> Input Setup Time Digital Pixel Data P<7:0> Input Hold Time HSYN and VSYN ...
Page 23
Symbol Characteristics K K IMBAC DAC Imbalance Between DACs I DAC Reference Current (I REF R Reference Resistor (V REF V Blanking Level Output Voltage (NTSC and BLANK PAL Modes) V Video Output Compliance Voltage OC C Video Output Capacitance ...
Page 24
PACKAGING INFORMATION max A 2. 1.22 D 0.81 a 17.65 b 16.66 AV3168/69 44-Pin Plastic Leaded Chip Carrier Dimensions ...