AM79Q4457JC ETC-unknow, AM79Q4457JC Datasheet
AM79Q4457JC
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AM79Q4457JC Summary of contents
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Am79Q4457/5457 Quad Subscriber Line Audio Processing Circuit- Non-Programmable (QSLAC DISTINCTIVE CHARACTERISTICS n Performs the function of four Codec/Filters n A-law or µ-law coding n Single PCM port — 4.096 MHz operation (64 channels) n Hardware programmable (via external ...
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TABLE OF CONTENTS Distinctive Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... Discrimination against Out-of-Band Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 6. Spurious Out-of-Band Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 7. Am79Q4457 QSLAC-NP Device Serial Control Interface . . . . . . . . . . . . . . . . . 26 Figure 8. QSLAC-NP Device Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 9a. Am79Q4457JC Device (Channel 1 Shown Figure 9b. Am79Q5457 Device (Channel 1 Shown Figure 10. Am79Q4457JC Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 11. Am79Q5457JC Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 12. Balance Network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 13 ...
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BLOCK DIAGRAM Analog I1 IN1 Signal Processing *2 I2 IN1 Channel 1 ( OUT1 I1 IN2 Signal Processing *2 I2 IN2 Channel 2 ( OUT2 I1 IN3 Signal Processing *2 I2 IN3 Channel 3 (CH 3) ...
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ORDERING INFORMATION Standard Products Legerity standard products are available in several packages and operating ranges. The order number (Valid Combina- tion) is formed by a combination of the elements below. Am79Q4457/5457 DEVICE NUMBER/DESCRIPTION Am79Q4457/5457 Quad Subscriber Line Audio Processing Circuit-Non-Programmable ...
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... OUT2 V I REF1 AGND V OUT3 I1 I1 Note: Pin 1 is marked for orientation Am79Q4457JC IN1 6 ...
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CONNECTION DIAGRAMS (44-PIN TQFP PACKAGES) Top View I1 IN2 V OUT2 I2 IN2 I REF2 V CCA I REF1 AGND I REF3 I2 IN3 V OUT3 I1 IN3 I1 IN2 V OUT2 N/C N/C V CCA I REF1 AGND N/C ...
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PIN DESCRIPTIONS Pin Name Type A-law or µ-law Select. The A-law/µ-law select pin is used to inform the QSLAC-NP device which compression/expansion standard to use. A logic Low signal ( the A-law/µ-law pin selects the µ-law standard, and ...
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Pin Name Type Master Clock. The Master Clock frequency can be 1.536 MHz, 1.544 MHz, 2.048 MHz, or 4.096 MHz for use by the digital signal processor. Using the Transmit Frame Sync (FSX) Inputs, the MCLK Input QSLAC-NP device determines ...
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FUNCTIONAL DESCRIPTION The QSLAC-NP device performs the Codec/Filter and two-to-four-wire conversion function (requires external balance impedance) required of the subscriber line in- terface circuitry in telecommunications equipment. These functions involve converting an audio signal into digital PCM samples and converting ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature . . . . . . . . . –60°C < T Ambient Operating Temp . . . . . . . –40°C < T Ambient Relative Humidity . . . . . . . ...
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ELECTRICAL CHARACTERISTICS over operating ranges (unless otherwise noted) Typical values are for and nominal supply voltages. Minimum and maximum specifications are over the A temperature and supply voltage ranges shown in Operating Ranges. Symbol Parameter Descriptions ...
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Transmission Characteristics Signal at Digital Interface A-law digital mW or equivalent (0 dBm0) µ-law digital mW or equivalent (0 dBm0) Description Gain accuracy, either path Attenuation distortion Single frequency distortion Idle channel Analog out noise Analog out Analog out Digital ...
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Attenuation Distortion If a capacitive coupling network is used in series with either the transmit input or the receive output of the part, that network must have a corner frequency of less than meet the template in ...
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Group Delay Distortion For either transmission path, the group delay distortion is within the limits shown in Figure 2. The minimum value of the group delay is taken as the reference. The signal level should be 0 dBm0. 420 Delay ...
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Variation of Gain with Input Level The gain deviation relative to the gain at –10 dBm0 is within the limits shown in Figure 3 for either transmission path when the input is a sine wave signal of frequency 1014 Hz. ...
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Total Distortion, Including Quantizing Distortion The signal-to-total distortion will exceed the limits shown in Figure 4 for either transmission path when the input is a sine wave signal of frequency 1014 Hz ...
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Discrimination against Out-of-Band Input Signals When an out-of-band sine wave signal with frequency and level A is applied to the analog input, there may be fre- quency components below 4 kHz at the digital output caused by the out-of-band signal. ...
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Discrimination against 12 kHz and 16 kHz Metering Signals If the QSLAC-NP device is used in a metering applica- tion where 12 kHz or 16 kHz tone bursts are injected onto the telephone line toward the subscriber, a portion of ...
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SWITCHING CHARACTERISTICS over operating ranges (unless otherwise noted) Min and Max values are valid for all digital outputs with a 150 pF load. Control Interface No. Symbol 1 t Control Clock Period CCY 2 t Control Clock High Pulse Width ...
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Master Clock No. Symbol 38 A Master Clock Accuracy MCY 39 t Rise Time of Clock MCR 40 t Fall Time of Clock MCF 41 t MCLK High Pulse Width MCH 42 t MCLK Low Pulse Width MCL Notes: 1. ...
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Control Interface (Input Mode CCLK Data CI Valid Latch Outputs (Internal) Control Interface (Output Mode CCLK Three-State ...
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PCM Highway Timing (Short Frame Sync Mode) Same point in previous frame PCLK IL 26 FSX/FSR TSCA DXA DRA Time Slot Zero 28 Clock Slot Zero ...
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PCM Highway Timing (Long Frame Sync Mode) 28 PCLK FSX/FSR 36 TSCA 37 37 DXA First Bit DRA First Bit OPERATING THE QSLAC-NP DEVICES The following describes the operation of the four indepen- dent channels of ...
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CONTROL OF THE Am79Q4457/5457 QSLAC-NP DEVICES The QSLAC-NP device is controlled either directly via device pins (PDN and A/µ for the Am79Q5457 device) or through the serial control interface (Am79Q4457 device). Parallel Control (Am79Q5457 Device) The Am79Q5457 QSLAC-NP device is ...
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CCLK PDN CS 2 PDN CS 3 PDN CS 4 PDN Am79Q4457 Figure 7. Am79Q4457 QSLAC-NP Device Serial Control Interface I1 IN BNS1 *I2 ADC IN REF Select REF1 REF2 REF3 V *V ...
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Power Down (PDN ): n 0 — Powers the channel up 1 — Powers the channel down Reset State All four channel control registers are reset by the appli- cation of power. This resets the QSLAC-NP device to the following ...
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Long-Frame Sync Mode If each of the transmit (FSX ) frame sync pulses over- N lap three or more negative-going transitions of PCLK, the part operates in what is called Long-Frame Sync mode. The time slot begins at the first ...
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... REF1 I REF2 I REF3 V REF1 Multiplexer Vo V REF D *Optional Bal Net Connection Figure 9a. Am79Q4457JC Device (Channel 1 Shown) SLAC Products output and one V input as REF REF resistor and by the R REF1 3 R REF1 Gt = ---------------------- - R1 TX1 TGS1 TGS2 I R REF1 ...
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R1 C1 TX1 TX1 to SLIC I1 IN1 VTX * Bal Bal Net Net to SLIC OUT1 RX1 RX1 RSN 30 Am79Q5457 A/D I REF V REF D/A *Optional Bal Net Connection Figure 9b. ...
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... V OUT4 AGND DGND V CCA Digital GND RX1 C = 0.1 µF ± 20%, X7R FIL TX1 TX1 RX1 *Optional Balance Network connection. Figure 10. Am79Q4457JC Device SLAC Products R REF1 I REF1 R R REF2B REF2A I REF2 R R REF3B REF3A I REF3 C FIL V REF1 V REF2 V ...
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R1 C1 TX1 TX1 V TX Bal SLIC1 Z T1 Net RSN R C RX1 RX1 R1 C1 TX2 TX2 V TX Bal SLIC2 Z T2 Net RSN R C RX2 RX2 R1 C1 TX3 TX3 V TX Bal SLIC3 ...
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Calculation of Balance Network Th e balan ce fu nctio n is implemen ted with the QSLAC-NP device by connecting an external balance network (Z ) between the V and I BAL OUT suming the uncancelled receive path signal, which ...
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CONSIDERATIONS FOR CONNECTION TO SLICS There are several factors to consider with the connec- tion method used between the QSLAC-NP device and the SLIC. The R resistor controls the transmit path TX gain by establishing the current into the QSLAC-NP ...
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SLIC RSN R RX Figure 13. Balance Network Connection SLIC RSN R RX Figure 14. Alternate Balance Network Connection SLAC Products QSLAC-NP device ...
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PHYSICAL DIMENSIONS PL032 36 Am79Q4457/5457 Data Sheet Dwg rev AH; 10/99 ...
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PL044 SLAC Products Dwg rev. AN; 8/99 37 ...
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PQT044 38 Am79Q4457/5457 Data Sheet Dwg rev AS; 08/99 ...
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REVISION SUMMARY Revision B to Revision C • The physical dimensions (PL032, PL044 and PQT044) were added to the Physical Dimension section. • Updated the Pin Description table to correct inconsistencies. Revision C to Revision D • All the physical ...
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Notes: www.legerity.com ...
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Notes: www.legerity.com ...
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Legerity provides silicon solutions that enhance the performance, speeds time-to-market, and lowers the system cost of our customers’ products. By combining process, design, systems architecture, and a complete set of software and hardware support tools with unparalleled factory and worldwide ...
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The contents of this document are provided in connection with Legerity, Inc. products. Legerity makes no representations or warranties with re- spect to the accuracy or completeness of the contents of this publication and reserves the right to make changes ...
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P . 18200 Austin, Texas 78760-8200 Telepho ne: (512) 228-5400 Fax: (512) 228-5510 North America To ll Free: (800) 432-4009 To contact the Legerity Sales Office nearest you download or order product literature, visit our website ...