MBM29F016A-70PFTN Meet Spansion Inc., MBM29F016A-70PFTN Datasheet
![no-image](/images/no-image-200.jpg)
MBM29F016A-70PFTN
Related parts for MBM29F016A-70PFTN
MBM29F016A-70PFTN Summary of contents
Page 1
SPANSION Flash Memory TM Data Sheet September 2003 This document specifies SPANSION Fujitsu. Although the document is marked with the name of the company that originally developed the specification, these products will be offered to customers of both AMD and ...
Page 2
... MBM29F016A GENERAL DESCRIPTION The MBM29F016A M-bit, 5.0 V-Only Flash memory organized bytes of 8 bits each. The 2 M bytes of data is divided into 32 sectors bytes for flexible erase capability. The 8 bit of data will appear The MBM29F016A is offered in a 48-pin TSOP(1) package. This device is designed to be programmed 0 in-system with the standard system 5 ...
Page 3
... The MBM29F016A also has a hardware RESET pin. When this pin is driven low, execution of any Embedded Program or Embedded Erase operations will be terminated. The internal state machine will then be reset into the read mode. The RESET pin may be tied to the system reset circuity. Therefore system reset occurs during the Embedded Program or Embedded Erase operation, the device will be automatically reset to a read mode ...
Page 4
... Hardware method that disables any combination of sector groups from write or erase operation (a sector group consists of 4 adjacent sectors bytes each) • Temporary sector groups unprotection Temporary sector unprotection via the RESET pin * : Embedded Erase TM and Embedded Program MBM29F016A TM are trademarks of Advanced Micro Devices, Inc. -70/-90/-12 3 ...
Page 5
... RESET N. TSOP(1) (Marking Side) MBM29F016A Normal Bend (FPT-48P-M19) (Marking Side) MBM29F016A Reverse Bend (FPT-48P-M20) Function Address Inputs Data Inputs/Outputs Chip Enable Output Enable Write Enable Ready/Busy Output Hardware Reset Pin/Sector Protection Unlock No Internal Connection Device Ground Device Power Supply 48 N ...
Page 6
... RY/BY CC RY/BY V Buffer SS WE State Control RESET Command Register CE OE Low V Detector LOGIC SYMBOL 21 MBM29F016A Erase Voltage Generator Program Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer for Address Program/Erase Latch X-Decoder ...
Page 7
... Manufacturer and device codes may also be accessed via a command register write sequence. Refer to “MBM29F016A Command Definitions Table” in “ FLEXIBLE SECTOR-ERASE ARCHITECTURE” Refer to the section on Sector Group Protection can ...
Page 8
... X = “H” or “L” for all address commands except or Program Address (PA) and 20 11 Sector Address (SA). Bus operations are defined in “MBM29F016A User Bus Operations Table” in “ FLEXIBLE SECTOR- ERASE ARCHITECTURE” Address of the memory location to be read Autoselect read address that sets Address of the memory location to be programmed ...
Page 9
... MBM29F016A -70/-90/- SA0 0 SA1 0 SA2 0 SA3 0 SA4 0 SA5 0 SA6 0 SA7 0 SA8 0 SA9 0 SA10 0 SA11 0 SA12 0 SA13 0 SA14 0 SA15 0 SA16 1 SA17 1 SA18 1 SA19 1 SA20 1 SA21 1 SA22 1 SA23 1 SA24 1 SA25 1 SA26 1 SA27 1 SA28 1 SA29 1 SA30 1 SA31 SGA0 0 SGA1 0 SGA2 0 SGA3 0 SGA4 1 SGA5 ...
Page 10
... Individual-sector or multiple-sector erase capability • Sector group protection is user-definable SA31 SA30 SA29 SA28 32 Sectors Total SA3 SA2 SA1 SA0 MBM29F016A 1FFFFFh 64 K byte 1EFFFFh 64 K byte Sector 1DFFFFh Group byte 1CFFFFh 64 K byte 1BFFFFh 1AFFFFh ...
Page 11
... Standby Mode There are two ways to implement the standby mode on the MBM29F016A device, one using both the CE and RESET pins; the other via the RESET pin only. When using both pins, a CMOS standby mode is achieved with CE and RESET inputs both held at V Under this condition the current consumed is less than 5 A ...
Page 12
... Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters. Sector Group Protection The MBM29F016A features hardware sector group protection. This feature will disable both program and erase operations in any combination of eight sector groups of memory. Each sector group consists of four adjacent sectors grouped in the following pattern: sectors 0-3, 4-7, 8-11, 12-15, 16-19, 20-23, 24-27, and 28-31 (see “ ...
Page 13
... The operation is initiated by writing the autoselect command sequence into the command register. Following the command write, a read cycle from address XX00h retrieves the manufacture code of 04h. A read cycle from address XX01h returns the device code ADh. (See “MBM29F016A Sector Protection Verify Autoselect Codes Table” in “ FLEXIBLE SECTOR-ERASE ARCHITECTURE”). ...
Page 14
... WE. After time-out from the rising edge of the last sector erase command, the sector erase operation will begin. Multiple sectors may be erased concurrently by writing the six bus cycle operations on “MBM29F016A Command Definitions Table” in “ FLEXIBLE SECTOR-ERASE ARCHITECTURE”. This sequence is followed with writes of the Sector Erase command to addresses in other sectors desired to be concurrently erased ...
Page 15
... MBM29F016A -70/-90/-12 during this time-out period will reset the device to the read mode, ignoring the previous command string. Resetting the device once execution has begun will corrupt the data in that sector. In that case, restart the erase on those sectors and allow them to complete. (Refer to the Write Operation Status section for DQ operation ...
Page 16
... DQ 7 Data Polling The MBM29F016A device features Data Polling as a method to indicate to the host that the embedded algorithms are in progress or completed. During the Embedded Program Algorithm, an attempt to read the device will produce the complement of the data last written attempt to read the device will produce the true data last written to DQ Algorithm, an attempt to read the device will produce a “ ...
Page 17
... DQ 6 Toggle Bit I The MBM29F016A also features the “Toggle Bit I” method to indicate to the host system that the embedded algorithms are in progress or completed. During an Embedded Program or Erase Algorithm cycle, successive attempts to read (OE toggling) data from the device at any address will result in DQ Erase Algorithm cycle is completed, DQ attempts ...
Page 18
... RY/BY Ready/Busy The MBM29F016A provides a RY/BY open-drain output pin as a way to indicate to the host system that the Embedded Algorithms are either in progress or has been completed. If the output is low, the device is busy with either a program or erase operation. If the output is high, the device is ready to accept any read/write or erase operation ...
Page 19
... Flash memory. Data Protection The MBM29F016A is designed to offer protection against accidental erasure or programming caused by spurious system level signals that may exist during power transitions. During power up the device automatically resets the internal state machine in the Read mode. Also, with its control register architecture, alteration of the memory contents only occurs after successful completions of specific multi-bus cycle command sequences ...
Page 20
... No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. MBM29F016A Symbol Tstg T ...
Page 21
... MBM29F016A -70/-90/-12 MAXIMUM OVERSHOOT / MAXIMUM UNDERSHOOT 1. Maximum Undershoot Waveform +0.8 V –0.5 V –2 Maximum Overshoot Waveform Maximum Overshoot Waveform 2 +14.0 V +13 +0 Note : This waveform is applied for and RESET. ...
Page 22
... DC operating current and the frequency dependent component CC (at 6 MHz). The frequency component typically is 2 mA/MHz, with active while Embedded Algorithm (program or erase progress Applicable to sector protection function – not exceed MBM29F016A Symbol Test Conditions ...
Page 23
... MBM29F016A -70/-90/-12 AC CHARACTERISTICS • Read Only Operations Characteristics Parameter Read Cycle Time Address to Output Delay Chip Enable to Output Delay Output Enable to Output Delay Chip Enable to Output High-Z Output Enable to Output High-Z Output Hold Time From Addresses OE, whichever occurs first RESET Pin Low to Read Mode ...
Page 24
... RESET Hold Time Before Read Program/Erase Valid to RY/BY Delay Delay Time from Embedded Output Time *1 : This does not include the preprogramming time This timing is for Sector Protection operation. MBM29F016A Symbol MBM29F016A -70 JEDEC Standard Min Typ Max Min Typ Max Min Typ Max — ...
Page 25
... MBM29F016A -70/-90/-12 ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Byte Programming Time Chip Programming Time Erase/Program Cycle TSOP(1) PIN CAPACITANCE Parameter Parameter Description Symbol C Input Capacitance IN C Output Capacitance OUT C Control Pin Capacitance IN2 Note : Test conditions T = 25° 1.0 MHz A 24 ...
Page 26
... TIMING DIAGRAM • Key to Switching Waveforms WAVEFORM (1) AC Waveforms for Read Operations Address High-Z Outputs MBM29F016A INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Be Change Changing from from May Will Be Change Changing from from “H” or “L” ...
Page 27
... MBM29F016A -70/-90/-12 (2) AC Waveforms for Alternate WE Controlled Program Operations 3rd Bus Cycle Address 555h A0h Data t DS 5.0 V Notes : PA is address of the memory location to be programmed data to be programmed at byte address the output of the complement of the data written to the device. ...
Page 28
... PD is data to be programmed at byte address the output of the complement of the data written to the device the output of the data written to the device. OUT Figure indicates last two bus cycles of four bus cycle sequence. MBM29F016A Data Polling ...
Page 29
... MBM29F016A -70/-90/-12 (4) AC Waveforms Chip/Sector Erase Operations Address CE t GHWL Data VCS the sector address for Sector Erase. Address = 555h for Chip Erase 555h 2AAh 555h 555h WPH t DH AAh 55h 80h 2AAh SA* ...
Page 30
... Valid Data (The device has completed the Embedded operation.) 7 (6) AC Waveforms for Toggle Bit I during Embedded Algorithm Operations CE t OEH WE t OES OE DQ Data stops toggling (The device has completed the Embedded operation.) 6 MBM29F016A OEH WHWH1 Output Flug ...
Page 31
... MBM29F016A -70/-90/-12 (7) RY/BY Timing Diagram during Program/Erase Operations CE WE RY/BY (8) RESET, RY/BY Timing Diagram WE RESET RY/BY 30 Rising edge of the last WE signal Entire programming or erase operations t BUSY READY RB ...
Page 32
... 12V VLHT 12V VLHT WE t CSP CE Data t VCS V CC SGAX Sector Group Address for initial sector SGAY Sector Group Address for next sector MBM29F016A SGAX t VLHT t VLHT t WPP t OESP -70/-90/-12 SGAY 01h ...
Page 33
... MBM29F016A -70/-90/-12 (10) Temporary Sector Group Unprotection Timing Diagram VIDR t VCS RESET CE WE RY/BY (11 Enter Erase Embedded Suspend Erasing WE Erase Erase Suspend Toggle DQ and with read from the erase-suspended sector Program or Erase Command Sequence ...
Page 34
... FLOW CHART (1) Embedded Program TM Algorithm EMBEDDED ALGORITHMS Increment Address MBM29F016A Start Write Program Command Sequence (See Below) Data Polling Device No Last Address ? Yes Programming Completed Program Command Sequence (Address/Command): 555h/AAh 2AAh/55h 555h/A0h Program Address/Program Data -70/-90/-12 33 ...
Page 35
... MBM29F016A -70/-90/-12 (2) Embedded Erase™ Algorithm Chip Erase Command Sequence (Address/Command): Note : To insure the command has been accepted, the system software should check the status of DQ prior to and following each subsequent sector erase command the second status check, the command may not have been accepted. ...
Page 36
... Data Polling Algorithm Read Byte (DQ Addr Read Byte (DQ Addr Note : DQ is rechecked even MBM29F016A Start VA = Address for programming = Any of the sector addresses within the sector being erased during sector erase or multiple erases operation. Yes = Data Any of the sector group ...
Page 37
... MBM29F016A -70/-90/-12 (4) Toggle Bit I Algorithm *1: Read toggle bit twice to determine whether it is toggling. * rechecked even changing to “1”. 36 Start *1 Read ( Addr. = “H” or “L” *1 Read ( Addr. = “H” or “L” Toggle 6 ? Yes ...
Page 38
... Sector Group Protection Algorithm Increment PLSCNT No PLSCNT = 25? Yes Remove V from A ID Write Reset Command Device Failed MBM29F016A Start Setup Sector Group Addr PLSCNT = RESET = Activate WE Pulse Time out 100 IH, ...
Page 39
... MBM29F016A -70/-90/-12 (6) Temporary Sector Group Unprotection Algorithm *1 : All Protected sector groups unprotected All previously protected sector groups are protected once again. 38 Start 1 RESET = Perform Erase or Program Operations RESET = V IH Temporary Sector Group 2 Unprotection Completed * ...
Page 40
... ORDERING INFORMATION Part No. MBM29F016A-70PFTN 48-pin plastic TSOP (1) MBM29F016A-90PFTN (FPT-48P-M19) MBM29F016A-12PFTN (Normal Bend) MBM29F016A-70PFTR 48-pin plastic TSOP (1) MBM29F016A-90PFTR (FPT-48P-M20) MBM29F016A-12PFTR (Reverse Bend) MBM29F016 A -70 DEVICE NUMBER/DESCRIPTION MBM29F016 16 Mega-bit (2 M 5.0 V-only Read, Write, and Erase 64 K Byte (32 Sectors) MBM29F016A Package Access Time (ns) ...
Page 41
... MBM29F016A -70/-90/-12 PACKAGE DIMENSIONS Note Values do not include resin protrusion. 48-pin plastic TSOP(1) (FPT-48P-M19) Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. LEAD No. 1 INDEX 24 20.00 (.787 * 18.40 (.724 "A" 0.10(.004) 2003 FUJITSU LIMITED F48029S-c-6-7 ...
Page 42
... FUJITSU LIMITED F48030S-c-6-7 C MBM29F016A Resin protrusion and gate protrusion are 0.15 (.006) Max (each side Details of "A" part 25 +0.03 0.17 –0.08 +.001 .007 –.003 0.50(.020) * 12.00 Dimensions in mm (inches) . Note : The values in parentheses are reference values. ...
Page 43
... MBM29F016A -70/-90/-12 FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device ...