AM29F800BT-55SI Meet Spansion Inc., AM29F800BT-55SI Datasheet
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AM29F800BT-55SI
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AM29F800BT-55SI Summary of contents
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Am29F800B Data Sheet The following document contains information on Spansion memory products. Continuity of Specifications There is no change to this data sheet as a result of offering the device as a Spansion product. Any changes that have been made ...
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DATA SHEET Am29F800B 8 Megabit ( 8-Bit/512 K x 16-Bit) CMOS 5.0 Volt-only, Boot Sector Flash Memory DISTINCTIVE CHARACTERISTICS ■ Single power supply operation — 5.0 Volt-only operation for read, erase, and program operations — Minimizes system level ...
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GENERAL DESCRIPTION The Am29F800B Mbit, 5.0 volt-only Flash memory organized as 1,048,576 bytes or 524,288 words. The device is offered in 44-pin SO, 48-pin TSOP, and 48-ball FBGA packages. The device is also available in Known Good ...
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... Program and Erase Operation Status .................................... 10 Standby Mode ........................................................................ 10 RESET#: Hardware Reset Pin ............................................... 10 Output Disable Mode .............................................................. 10 Table 2. Am29F800BT Top Boot Block Sector Address Table .......11 Table 3. Am29F800BB Bottom Boot Block Sector Address Table ..12 Autoselect Mode ..................................................................... 12 Table 4. Am29F800B Autoselect Codes (High Voltage Method) ....13 Sector Protection/Unprotection ............................................... 13 Temporary Sector Unprotect ...
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PRODUCT SELECTOR GUIDE Family Part Number Speed Option V = 5.0 V ± 10% CC Max access time ACC Max CE# access time Max OE# access time Note: See ...
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CONNECTION DIAGRAMS This device is also available in Known Good Die (KGD) form. Refer to publication number 21631 for more information. A15 1 A14 2 A13 3 A12 4 A11 5 6 A10 ...
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CONNECTION DIAGRAMS This device is also available in Known Good Die (KGD) form. Refer to publication number 21631 for more information A13 A12 WE# RESET RY/BY ...
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PIN CONFIGURATION A0–A18 = 19 addresses DQ0–DQ14 = 15 data inputs/outputs DQ15/A-1 = DQ15 (data input/output, word mode), A-1 (LSB address input, byte mode) BYTE# = Selects 8-bit or 16-bit mode CE# = Chip enable OE# = Output enable WE# ...
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... Top sector B = Bottom sector Valid Combinations for FBGA Packages Order Number AM29F800BT-55, AM29F800BB-55 AM29F800BT-70, AM29F800BB-70 AM29F800BT-90, AM29F800BB-90 AM29F800BT-120, AM29F800BB-120 Valid Combinations list configurations planned to be sup- ported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations ...
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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register it- self does not occupy any addressable memory loca- tion. The register is composed ...
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After the system writes the autoselect command se- quence, the device enters the autoselect mode. The system can then read autoselect codes ...
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... Table 2. Am29F800BT Top Boot Block Sector Address Table Sector A18 A17 A16 A15 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 ...
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Table 3. Am29F800BB Bottom Boot Block Sector Address Table Sector A18 A17 A16 A15 SA0 SA1 SA2 SA3 SA4 SA5 ...
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Table 4. Am29F800B Autoselect Codes (High Voltage Method) Description Mode CE# Manufacturer ID: AMD L Device ID: Word L Am29F800B Byte L (Top Boot Block) Device ID: Word L Am29F800B Byte L (Bottom Boot Block) Sector Protection Verification L L ...
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Hardware Data Protection The command sequence requirement of unlock cycles for programming or erasing provides data protection against inadvertent writes (refer to the Command Defi- nitions table). In addition, the following hardware data protection measures prevent accidental erasure or pro- ...
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Autoselect Command Sequence The autoselect command sequence allows the host system to access the manufacturer and devices codes, and determine whether or not a sector is protected. The Command Definitions table shows the address and data requirements. This method is ...
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Any commands written to the chip during the Embed- ded Erase algorithm are ignored. Note that a hardware reset during the chip erase operation immediately ter- minates the operation. The Chip Erase command se- quence should be reinitiated once the ...
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DQ6 status bits, just as in the standard program oper- ation. See “Write Operation Status” for more informa- tion. The system may also write the autoselect command sequence when the device is in the Erase Suspend mode. The device allows ...
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Command Definitions Table 5. Am29F800B Command Definitions Command Sequence (Note 1) Read (Note 6) 1 Reset (Note 7) 1 Word Manufacturer ID 4 Byte Word Device ID, 4 Top Boot Block Byte Word Device ID, 4 Bottom Boot Block Byte ...
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WRITE OPERATION STATUS The device provides several bits to determine the sta- tus of a write operation: DQ2, DQ3, DQ5, DQ6, DQ7, and RY/BY#. Table 6 and the following subsections de- scribe the functions of these bits. DQ7, RY/BY#, and ...
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RY/BY#: Ready/Busy# The RY/BY dedicated, open-drain output pin that indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since ...
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The remaining scenario is that the system initially de- termines that the toggle bit is toggling and DQ5 has not gone high. The system may continue to ...
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Operation Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Reading within Erase Suspended Sector Erase Suspend Reading within Non-Erase Mode Suspended Sector Erase-Suspend-Program Notes: 1. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . –65°C to +150°C Ambient Temperature with Power Applied ...
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DC CHARACTERISTICS TTL/NMOS Compatible Parameter Description I Input Load Current LI I A9, OE#, RESET Input Load Current LIT I Output Leakage Current LO V Active Read Current CC I CC1 (Notes Active Write Current CC I ...
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DC CHARACTERISTICS CMOS Compatible Parameter Description I Input Load Current LI A9, OE#, RESET Input Load I LIT Current I Output Leakage Current LO V Active Read Current CC I CC1 (Note 2) V Active Write Current CC I CC2 ...
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TEST CONDITIONS Device Under Test C L 6.2 kΩ Note: Diodes are IN3064 or equivalents. Figure 8. Test Setup KEY TO SWITCHING WAVEFORMS WAVEFORM Don’t Care, Any Change Permitted Table ...
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AC CHARACTERISTICS Read Operations Parameter JEDEC Std Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to Output ...
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AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std Description RESET# Pin Low (During Embedded t READY Algorithms) to Read or Write (See Note) RESET# Pin Low (NOT During Embedded t READY Algorithms) to Read or Write (See Note) t RESET# ...
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AC CHARACTERISTICS Word/Byte Configuration (BYTE#) Parameter JEDEC Std Description t t CE# to BYTE# Switching Low or High ELFL/ ELFH t BYTE# Switching Low to Output HIGH Z FLQZ t BYTE# Switching High to Output Active FHQV CE# OE# BYTE# ...
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AC CHARACTERISTICS Erase/Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH ...
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AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE# OE# WE Data RY/BY# t VCS V CC Notes program address program data Illustration shows device in word ...
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AC CHARACTERISTICS t WC Addresses 2AAh CE Data RY/BY# t VCS V CC Note Sector Address Valid Address for reading status data. Figure 14. Chip/Sector Erase Operation Timings 32 ...
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AC CHARACTERISTICS t RC Addresses VA t ACC OE# t OEH WE# DQ7 DQ0–DQ6 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, last status read ...
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AC CHARACTERISTICS Enter Erase Embedded Suspend Erasing Erase Erase Suspend WE# DQ6 DQ2 Note: The system may use OE# or CE# to toggle DQ2 and DQ6. DQ2 toggles only when read at an address within the erase-suspended sector. Temporary Sector ...
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AC CHARACTERISTICS Alternate CE# Controlled Erase/Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVEL Address Hold Time ELAX Data Setup Time DVEH ...
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AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes Program Address Program Data Sector Address, DQ7# = Complement ...
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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time (Note 2) Byte Programming Time Word Programming Time Byte Mode Chip Programming Time (Note 2) Word Mode Notes: 1. Typical program and erase times assume the following conditions: 25 ...
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PHYSICAL DIMENSIONS SO 044—44-Pin Small Outline Package Am29F800B Dwg rev AC; 10/99 21504E5 November 2, 2006 ...
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PHYSICAL DIMENSIONS (continued) TS 048—48-Pin Standard Pinout Thin Small Outline Package (TSOP) November 2, 2006 21504E5 Am29F800B Dwg rev AA; 10/99 39 ...
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PHYSICAL DIMENSIONS (continued) FBB048—48-Ball Fine-Pitch Ball Grid Array (FBGA package Am29F800B Dwg rev AF; 10/99 21504E5 November 2, 2006 ...
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REVISION SUMMARY Revision A (August 1997) Initial release. Revision B (October 1997) Global Added -55 speed option. Changed data sheet designa- tion from Advance Information to Preliminary. Sector Protection/Unprotection Corrected text to indicate that these functions can only be implemented ...
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REVISION SUMMARY (Continued) Revision D (January 1999) Distinctive Characteristics Added the 20-year data retention subbullet. Ordering Information Optional Processing: Deleted “B = Burn-in”. DC Characteristics—TTL/NMOS Compatible I : Added OE# and RESET to the Description column. LIT Changed “A9 = ...