LT6552CS8#TRPBF Linear Technology, LT6552CS8#TRPBF Datasheet - Page 12

• Manufacturer Part Number: LT6552CS8#TRPBF
• Description: IC OPAMP VID DIFF SGL 3.3V 8SOIC
• Manufacturer: Linear Technology

Specifications of LT6552CS8#TRPBF

• Applications: Differential
• Number Of Circuits: 1
• -3db Bandwidth: 75MHz
• Slew Rate: 600 V/µs
• Current - Supply: 14mA
• Current - Output / Channel: 70mA
• Voltage - Supply, Single/dual (±): 3 V ~ 12.6 V, ±1.5 V ~ 6.3 V
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LT6552
APPLICATIO S I FOR ATIO
Amplifier Characteristics
Figure 5 shows a simplified schematic of the LT6552.
There are two input stages; the first one consists of
transistors Q1 to Q8 for the (+) and (–) inputs while the
second input stage consists of transistors Q9 to Q16 for
the reference and feedback inputs. This topology provides
high slew rates at low supply voltages. The input common
mode range extends from ground to typically 1.75V from
V
current sources I1-I4. Each input stage drives the degen-
eration resistors of PNP and NPN current mirrors, Q17 to
Q20, that convert the differential signals into a single-
ended output. The complementary drive generator sup-
plies current to the output transistors that swing from rail-
to-rail.
12
CC
+IN
, and is limited by 2V
3
R
IN1
V
V
–
+
Q2
Q1
DESD1
DESD2
I1
Q3
Q4
R1
Q5
Q6
U
DESD3
DESD4
Q7
Q8
BE
U
V
V
–
+
’s plus a saturation voltage of
I2
–IN
2
R
IN2
W
REF
1
R
IN3
V
V
–
+
Q10
Q9
DESD5
DESD6
I3
Figure 5. Simplified Schematic
U
Q11
Q12
R2
Q13
Q14
DESD7
DESD8
Q15
Q16
V
V
+
–
The current generated through R1 or R2, divided by the
capacitor CM, determines the slew rate. Note that this
current, and hence the slew rate, are proportional to the
magnitude of the input step. The input step equals the
output step divided by the closed-loop gain. The highest
slew rates are therefore obtained in the lowest gain con-
figurations. The Typical Performance Characteristic Curve
of Slew Rate vs Closed-Loop Gain shows the details.
ESD
The LT6552 has reverse-biased ESD protection diodes on
all inputs and outputs, as shown in Figure 5. If these pins
are forced beyond either supply, unlimited current will
flow through these diodes. If the current is transient in
nature and limited to 100mA or less, no damage to the
device will occur.
I4
FB
8
R
IN4
I6
I5
Q17
Q19
R3
R5
BIAS
Q18
Q20
R4
R6
DRIVE GENERATOR
COMPLEMENTARY
V
+
CM
V
V
–
+
DESD11
DESD12
5
Q21
Q22
6552 FO5
SHDN
V
V
+
–
DESD9
DESD10
7
6
4
V
OUT
V
+
–
6552f