AM29LV400T-120EI Advanced Micro Devices, AM29LV400T-120EI Datasheet

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AM29LV400T-120EI

Manufacturer Part Number
AM29LV400T-120EI
Description
Manufacturer
Advanced Micro Devices
Datasheet
Am29LV400
4 Megabit (512 K x 8-Bit/256 K x 16-Bit)
CMOS 3.0 Volt-only Boot Sector Flash Memory
DISTINCTIVE CHARACTERISTICS
Single power supply operation
— Full voltage range: 2.7 to 3.6 volt read and write
— Regulated voltage range: 3.0 to 3.6 volt read
High performance
— Full voltage range: access times as fast as 100
— Regulated voltage range: access times as fast
Ultra low power consumption (typical values at
5 MHz)
— 200 nA Automatic Sleep mode current
— 200 nA standby mode current
— 10 mA read current
— 20 mA program/erase current
Flexible sector architecture
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
— One 8 Kword, two 4 Kword, one 16 Kword, and
— Supports full chip erase
— Sector Protection features:
operations for battery-powered applications
and write operations and for compatibility with
high performance 3.3 volt microprocessors
ns
as 90 ns
seven 64 Kbyte sectors (byte mode)
seven 32 Kword sectors (word mode)
A hardware method of locking a sector to
prevent any program or erase operations within
that sector
Sectors can be locked via programming
equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
PRELIMINARY
Top or bottom boot block configurations
available
Embedded Algorithms
— Embedded Erase algorithm automatically
— Embedded Program algorithm automatically
Typical 1,000,000 write cycles per sector
(100,000 cycles minimum guaranteed)
Package option
— 48-ball FBGA
— 48-pin TSOP
— 44-pin SO
Compatibility with JEDEC standards
— Pinout and software compatible with single-
— Superior inadvertent write protection
Data# Polling and toggle bits
— Provides a software method of detecting
Ready/Busy# pin (RY/BY#)
— Provides a hardware method of detecting
Erase Suspend/Erase Resume
— Suspends an erase operation to read data from,
Hardware reset pin (RESET#)
— Hardware method to reset the device to reading
preprograms and erases the entire chip or any
combination of designated sectors
writes and verifies data at specified addresses
power supply Flash
program or erase operation completion
program or erase cycle completion
or program data to, a sector that is not being
erased, then resumes the erase operation
array data
Publication# 20514
Issue Date: March 1998
Rev: C Amendment/+1

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AM29LV400T-120EI Summary of contents

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PRELIMINARY Am29LV400 4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory DISTINCTIVE CHARACTERISTICS Single power supply operation — Full voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications — ...

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GENERAL DESCRIPTION The Am29LV400 Mbit, 3.0 volt-only Flash memory organized as 524,288 bytes or 262,144 words. The device is offered in 48-ball FBGA, 44-pin SO, and 48-pin TSOP packages. The word-wide data (x16) appears on DQ15–DQ0; the ...

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PRODUCT SELECTOR GUIDE Family Part Number Regulated Voltage Range: V Speed Options Full Voltage Range: V Max access time ACC Max CE# access time Max OE# access time Note: ...

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CONNECTION DIAGRAMS A15 1 A14 2 3 A13 A12 4 A11 5 A10 WE# 11 RESET RY/BY A17 ...

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CONNECTION DIAGRAMS NC RY/BY# A17 CE OE# DQ0 DQ8 DQ1 DQ9 DQ2 DQ10 DQ3 DQ11 RY/BY# A4 WE# RESET A13 5 P ...

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Special Handling Instructions for Fine PItch Ball Grid Array (FBGA) Special handling is required for Flash Memory products in FBGA packages. PIN CONFIGURATION A0–A17 = 18 addresses DQ0–DQ14 = 15 data inputs/outputs DQ15/A-1 = DQ15 (data input/output, word mode), A-1 ...

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... EC, EI, FC, Am29LV400B70R FI, SC, SI, WAC Am29LV400T80, Am29LV400B80 EC, EI, EE, Am29LV400T90, FC, FI, FE, Am29LV400B90 SC, SI, SE, WAC, WAI, WAE Am29LV400T120, Am29LV400B120 OPTIONAL PROCESSING Blank = Standard Processing B = Burn-in (Contact an AMD representative for more information) TEMPERATURE RANGE C = Commercial (0°C to +70° Industrial (– ...

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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory location. The register is composed of latches ...

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After the system writes the autoselect command se- quence, the device enters the autoselect mode. The system can then read autoselect codes from the inter- ...

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... Table 2. Am29LV400T Top Boot Block Sector Address Table Sector A17 A16 A15 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 Table 3. Am29LV400B Bottom Boot Block Sector Address Table ...

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Autoselect Mode The autoselect mode provides manufacturer and de- vice identification, and sector protection verification, through identifier codes output on DQ7–DQ0. This mode is primarily intended for programming equipment to automatically match a device to be programmed with its corresponding ...

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START RESET (Note 1) Perform Erase or Program Operations RESET Temporary Sector Unprotect Completed (Note 2) Notes: 1. All protected sectors unprotected. 2. All previously protected sectors are protected once again. Figure 1. Temporary Sector Unprotect ...

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COMMAND DEFINITIONS Writing specific address and data commands or se- quences into the command register initiates device op- erations. Table 5 defines the valid register command sequences. Writing incorrect address and data val- ues or writing them in the improper ...

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Any commands written to the device during the Em- bedded Program Algorithm are ignored. Note that a hardware reset immediately terminates the program- ming operation. The Byte Program command se- quence should be reinitiated once the device has reset to ...

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The interrupts can be re-enabled after the last Sector Erase command is written. If the time between additional sector erase commands can be assumed to be less than 50 s, the system need not monitor ...

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START Write Erase Command Sequence Data Poll from System No Data = FFh? Yes Erasure Completed Notes: 1. See Table 5 for erase command sequence. 2. See “DQ3: Sector Erase Timer” for more information. Figure 3. Erase Operation P R ...

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Table 5. Am29LV400 Command Definitions Command Sequence (Note 1) Read (Note 6) 1 Reset (Note 7) 1 Word Manufacturer ID 4 Byte Word Device ID, 4 Top Boot Block Byte Word Device ID, 4 Bottom Boot Block Byte Word Sector ...

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WRITE OPERATION STATUS The device provides several bits to determine the sta- tus of a write operation: DQ2, DQ3, DQ5, DQ6, DQ7, and RY/BY#. Table 6 and the following subsections de- scribe the functions of these bits. DQ7, RY/BY#, and ...

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RY/BY#: Ready/Busy# The RY/BY dedicated, open-drain output pin that indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since ...

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The remaining scenario is that the system initially de- termines that the toggle bit is toggling and DQ5 has not gone high. The system may continue to monitor the toggle bit and DQ5 through successive read cycles, de- termining the ...

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Operation Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Reading within Erase Suspended Sector Erase Suspend Reading within Non-Erase Mode Suspended Sector Erase-Suspend-Program Notes: 1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the ...

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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . – +150 C Ambient Temperature with Power Applied . . . . . . . . ...

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DC CHARACTERISTICS CMOS Compatible Parameter Description I Input Load Current Input Load Current LIT I Output Leakage Current LO V Active Read Current CC I CC1 (Note 1) V Active Write Current CC I CC2 (Notes 2 ...

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DC CHARACTERISTICS (Continued) Zero Power Flash 500 1000 Note: Addresses are switching at 1 MHz Figure 8. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 ...

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TEST CONDITIONS Device Under Test C L 6.2 k Note: Diodes are IN3064 or equivalent Figure 10. Test Setup KEY TO SWITCHING WAVEFORMS WAVEFORM Don’t Care, Any Change Permitted 3.0 V 1.5 V Input 0.0 V Figure 11. Input Waveforms ...

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AC CHARACTERISTICS Read Operations Parameter JEDEC Std Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to Output ...

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AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std Description RESET# Pin Low (During Embedded t READY Algorithms) to Read or Write (See Note) RESET# Pin Low (NOT During Embedded t READY Algorithms) to Read or Write (See Note) t RESET# ...

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AC CHARACTERISTICS Word/Byte Configuration (BYTE#) Parameter JEDEC Std. Description t t CE# to BYTE# Switching Low or High ELFL/ ELFH t BYTE# Switching Low to Output HIGH Z FLQZ t BYTE# Switching High to Output Active FHQV CE# OE# BYTE# ...

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AC CHARACTERISTICS Erase/Program Operations Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH ...

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AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE# t GHWL OE# WE Data RY/BY VCS Notes program address program data Illustration shows device ...

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AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE# t GHWL OE WE Data 55h RY/BY# t VCS V CC Notes sector address (for Sector Erase), VA ...

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AC CHARACTERISTICS t RC Addresses VA t ACC OE# t OEH WE# DQ7 DQ0–DQ6 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, last status read ...

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AC CHARACTERISTICS Enter Erase Embedded Suspend Erasing Erase Erase Suspend WE# DQ6 DQ2 Note: The system may use OE# and CE# to toggle DQ2 and DQ6. DQ2 toggles only when read at an address within an erase-suspended sector. Temporary Sector ...

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AC CHARACTERISTICS Alternate CE# Controlled Erase/Program Operations Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVEL Address Hold Time ELAX Data Setup Time DVEH ...

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AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes program address program data, DQ7# = complement of the data written ...

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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Byte Programming Time Word Programming Time Byte Mode Chip Programming Time (Note 3) Word Mode Notes: 1. Typical program and erase times assume the following conditions 3.0 ...

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PHYSICAL DIMENSIONS* TS 048—48-Pin Standard TSOP (measured in millimeters) Pin 1 I. 1.20 MAX 0.25MM (0.0098") BSC * For reference only. BSC is an ANSI standard for Basic Space Centering. TSR048—48-Pin Reverse TSOP (measured in millimeters) Pin 1 ...

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PHYSICAL DIMENSIONS Fine-Pitch Ball Grid Array (FBGA) (measured in millimeters) DATUM B 0.025 CHAMFER INDEX 0.80 0.40 0.08 (48x) 0. 0.25 0.45 1.20 MAX ...

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PHYSICAL DIMENSIONS SO 044—44-Pin Small Outline Package (measured in millimeters 1.27 NOM. TOP VIEW 28.00 28.40 2.17 2.45 0.35 0.50 SIDE VIEW 13.10 15.70 13.50 ...

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... Trademarks Copyright © 1998 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD logo, and combinations thereof are registered trademarks of Advanced Micro Devices, Inc. Product names used in this publication are for identification purposes only and may be trademarks of their respective companies. ...

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