AD8304ARU-REEL Analog Devices Inc, AD8304ARU-REEL Datasheet - Page 18

• Manufacturer Part Number: AD8304ARU-REEL
• Description: IC LOGARITHMIC CONV 14-TSSOP T/R
• Manufacturer: Analog Devices Inc
• Type: Logarithmic Converterr

Specifications of AD8304ARU-REEL

• Rohs Status: RoHS non-compliant
• Design Resources: Interfacing ADL5315 to Translinear Logarithmic Amplifier (CN0056) Interfacing ADL5317 High Side Current Mirror to a Translinear Logarithmic Amplifier in an Avalanche Photodiode Power Detector
• Applications: Fiber Optics
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP

AD8304
The setup shown in Figure 20 was used for frequency response
measurements of the logarithmic amplifier section. In this con-
figuration, the AD8138 output was offset to 1.5 V and R1 was
adjusted to provide the appropriate operating current. The
buffer amplifier was then used; still any capacitance added at
the VLOG Pin during measurement would form a filter with the
on-chip 5 kΩ resistor.
The configuration illustrated in Figure 21 measures the device
noise. Batteries provide both the supply and the input signal to
remove the supplies as a possible noise source and to reduce
ground loop effects. The AD8304 Evaluation Board and the
current setting resistors are mounted in closed aluminum enclo-
sures to provide additional shielding to external noise sources.
OUTPUT INPUT INPUTA
SPLITTER
POWER
Figure 20. Configuration for Logarithmic
Amplifier Bandwidth Measurement
+IN
ANALYZER
NETWORK
HP 3577A
EVALUATION
AD8138
BOARD
INPUTB
B
A
INSTALLED
INPUT
R1
750
1nF
LK1
BIASER
LK2 OPEN
750
C11
1nF
SW1
R15
1
2
3
4
5
6
7
10k
0.1 F
VNEG
PWDN
VSUM
INPT
VSUM
VPDB
VREF
R10
C10
+V
AD8304
S
10nF
0.1nF
C9
ACOM
OPEN
OPEN
BFNG
VLOG
C1
0.1 F
VOUT
VPS1
VPS2
Figure 22. Evaluation Board Schematic
BFIN
R7
R7
R9
GND
14
13
12
11
10
9
8
1nF
R5
OPEN
R6
OPEN
C2
–V
S
1
2
3
4
5
6
7
VNEG
PWDN
VSUM
INPT
VSUM
VPDB
VREF
0.1 F
+V
AD8304
OPEN
OPEN
S
R4
R3
–18–
ACOM
BFNG
VLOG
VOUT
VPS1
VPS2
Evaluation Board
An evaluation board is available for the AD8304, the schematic
for which is shown in Figure 22, and the two board sides are
shown in Figure 23 and Figure 24. It can be configured for a wide
variety of experiments. The board is factory set for Photocon-
ductive Mode with a buffer gain of unity, providing a slope of
10 mV/dB and an intercept of 100 pA. By substituting resistor and
capacitor values, all of the application circuits presented in this
data sheet can be evaluated. Table V describes the various configu-
ration options.
BFIN
ALKALINE
D CELL
14
13
12
11
10
9
8
Figure 21. Configuration for Noise Spectral
Density Measurement
R2
0
C6
OPEN
1nF
R11
OPEN
0
C3
R1
R14
0
750
R1
1nF
C7
OPEN
0.1 F
C4
R12
OPEN
C5
OPEN
1
2
3
4
5
6
7
R13
0
VNEG
PWDN
VSUM
INPT
VSUM
VPDB
VREF
SOURCE TRIGGER
AD8304
C8
OPEN
ACOM
BFNG
VLOG
VOUT
BUFFER
VPS1
VPS2
BFIN
OUT
LOG
OUT
HP 89410A
14
13
12
11
10
9
8
CHANNEL
1
ALKALINE
D CELL
CHANNEL
REV. A
2