AD8305ACP-R2 Analog Devices Inc, AD8305ACP-R2 Datasheet - Page 11

IC LOGARITHM CONV 100DB 16-LFCSP

AD8305ACP-R2

Manufacturer Part Number
AD8305ACP-R2
Description
IC LOGARITHM CONV 100DB 16-LFCSP
Manufacturer
Analog Devices Inc
Type
Logarithmic Converterr
Datasheet

Specifications of AD8305ACP-R2

Rohs Status
RoHS non-compliant
Design Resources
Interfacing ADL5315 to Translinear Logarithmic Amplifier (CN0056) Interfacing ADL5317 High Side Current Mirror to a Translinear Logarithmic Amplifier in an Avalanche Photodiode Power Detector
Applications
Fiber Optics
Mounting Type
Surface Mount
Package / Case
16-LFCSP
Other names
AD8305ACP-R2CT
GENERAL STRUCTURE
The AD8305 addresses a wide variety of interfacing conditions
to meet the needs of fiber optic supervisory systems, and is also
useful in many nonoptical applications. These notes explain the
structure of this unique style of translinear log amp. Figure 33 is
a simplified schematic showing the key elements.
INPUT CURRENT
The photodiode current, I
voltage at this node is essentially equal to those on the two
adjacent guard pins, VSUM and IREF, due to the low offset
voltage of the JFET op amp. Transistor Q1 converts the input
current I
Equation 1. A finite positive value of V
collector of Q1 for the usual case of a single-supply voltage. This
is internally set to 0.5 V, that is, one fifth of the reference voltage
of 2.5 V appearing on Pin VREF. The resistance at the VSUM
pin is nominally 16 kΩ; this voltage is not intended as a general
bias source.
The AD8305 also supports the use of an optional negative
supply voltage, V
negative, VSUM may be connected to ground; thus, INPT and
IREF assume this potential. This allows operation as a voltage-
input logarithmic converter by the inclusion of a series resistor
at either or both inputs. Note that the resistor setting I
to be adjusted to maintain the intercept value. It should also be
noted that the collector-emitter voltages of Q1 and Q2 are now
the full V
input currents.
The input dependent, V
V
externally, to a recommended value of 10 μA. However, other
values over a several-decade range can be used with a slight
degradation in law conformance (see Figure 3).
PHOTODIODE
BE2
INPT
I
PD
of a second transistor, Q2, operating at I
Q1
0.5V
VNEG (NORMALLY GROUNDED)
PD
N
, and effects due to self-heating causes errors at large
to a corresponding logarithmic voltage, as shown in
GENERATOR
VSUM
80kΩ
2.5V
0.5V
BIAS
N
, at Pin VNEG. When V
20kΩ
Figure 33. Simplified Schematic
V
VREF
BE1
BE1
COMM
, of Q1 is compared with the reference
PD
0.5V
, is received at Pin INPT. The
Q2
IREF
I
REF
SUM
V
V
V
BE2
BE1
BE2
VRDZ
N
is needed to bias the
REF
is −0.5 V or more
COMPENSATION
(SUBTRACT AND
DIVIDE BY T × K
14.2kΩ
. This is generated
TEMPERATURE
6.69kΩ
44µA/dec
451Ω
COMM
REF
needs
VLOG
Rev. B | Page 11 of 24
THEORY
The base-emitter voltage of a BJT (bipolar junction transistor)
can be expressed by Equation 1, which immediately shows its
basic logarithmic nature:
where:
I
I
kT/q is the thermal voltage, proportional to absolute
temperature (PTAT) and is 25.85 mV at 300 K.
The current, I
stronger temperature dependence, varying by a factor of
roughly a billion between −35°C and +85°C. Thus, to make use
of the BJT as an accurate logarithmic element, both of these
temperature dependencies must be eliminated.
The difference between the base-emitter voltages of a matched
pair of BJTs, one operating at the photodiode current I
second operating at a reference current I
The uncertain and temperature dependent saturation current
IS, which appears in Equation 1, has thus been eliminated. To
eliminate the temperature variation of kT/q, this difference
voltage is processed by what is essentially an analog divider.
Effectively, it puts a variable under Equation 2. The output of
this process, which also involves a conversion from voltage-
mode to current-mode, is an intermediate, temperature-
corrected current:
where I
determines the slope of the function (the change in current per
decade). For the AD8305, I
independent slope of 44 mA/decade, for all values of I
I
mode output, V
It is apparent that this output should be zero for I
would need to swing negative for smaller values of input
current. To avoid this, I
smallest value of I
small reference current as 1 nA. Accordingly, an offset voltage is
added to V
directly connected to VREF. This has the effect of moving the
intercept to the left by four decades, from 10 μA to 1 nA:
where I
disable this offset, Pin VRDZ should be grounded, then the
intercept I
a negative VLOG, a negative supply of sufficient value is
C
S
REF
is a scaling current, typically only 10
is its collector current.
. This current is subsequently converted back to a voltage-
V
V
I
I
LOG
LOG
BE
BE1
Y
INTC
= kT/qIn(I
= I
is an accurate, temperature-stable scaling current that
= I
− V
INTC
LOG
is the operational value of the intercept current. To
Y
Y
BE2
log
log
S
is simply I
to shift it upward by 0.8 V when Pin VRDZ is
, is never precisely defined and exhibits an even
LOG
= kT/q In(I
10
10
= In(10)kT/qlog
= 59.5 mVlog
(I
(I
PD
, scaled 200 mV/decade.
PD
PD
C
. However, it is impractical to use such a
/I
/I
/I
S
)
REF
INTC
REF
REF
)
)
would need to be as small as the
. Because values of I
Y
C
/I
is 44 μA, resulting in a temperature
S
10
) − kT/q In(I
(I
10
PD
(I
/I
PD
REF
/I
REF
−17
)(T = 300 K)
REF
, can be written as:
A.
)
REF
/I
PD
S
)
PD
< I
= I
AD8305
INTC
PD
PD
REF
result in
and
and the
and
(1)
(2)
(3)
(4)

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