DS2404 Dallas Semiconductor, DS2404 Datasheet

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DS2404

Manufacturer Part Number
DS2404
Description
Manufacturer
Dallas Semiconductor
Datasheet

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www.dalsemi.com
FEATURES
§ 4096 bits of nonvolatile dual-port memory
§ 1-Wire
§ 3-wire host interface for high-speed data
§ Unique, factory-lasered and tested 64-bit
§ Memory partitioned into 16 pages of 256-bits
§ 256-bit scratchpad with strict read/write
§ Programmable alarms can be set to generate
§ 16-pin DIP, SOIC and SSOP packages
§ Operating temperature range from -40°C to
§ Operating voltage range from 2.8 to 5.5
ORDERING INFORMATION
DS2404
DS2404S
DS2404B
DESCRIPTION
The DS2404 EconoRAM Time Chip offers a simple solution for storing and retrieving vital data and time
information with minimal hardware. The DS2404 contains a unique lasered ROM, real-time
clock/calendar, interval timer, cycle counter, programmable interrupts and 4096-bits of SRAM. Two
separate ports are provided for communication, 1-Wire and 3-wire. Using the 1-Wire port, only one pin is
required for communication, and the lasered ROM can be read even when the DS2404 is without power.
The 3-wire port provides high speed communication using the traditional Dallas Semiconductor 3-wire
interface. With either interface, a strict protocol for accessing the DS2404 ensures data integrity. Utilizing
backup energy sources, the data is nonvolatile and allows for stand-alone operation.
The DS2404 features can be used to create a stopwatch, alarm clock, time and date stamp, logbook, hour
meter, calendar, system power cycle timer, expiration timer, and event scheduler.
including real time clock/calendar in binary
format, programmable interval timer, and
programmable power-on cycle counter
communication at 16.3k bits per second
communications at 2M bits per second
registration number (8-bit family code + 48-
bit serial number + 8-bit CRC tester) assures
absolute traceability because no two parts are
alike
for packetizing data
protocols ensures integrity of data transfer
interrupts for interval timer, real time clock,
and/or cycle counter
+85°C
Volts
TM
interface for MicroLAN
16-pin DIP
16-pin SOIC
16-pin SSOP
1 of 28
PIN ASSIGNMENT
PIN DESCRIPTION
V
IRQ
RST
DQ
I/O
CLK
NC
GND
V
V
1 Hz
X
VCC
DQ
I/O
CLK
NC
GND
IRQ
RST
CC
BATB
BATO
1
See Mechanical Drawings Section
,X
2
16-PIN SSOP (300 MIL)
16-PIN SOIC (300 MIL)
16-PIN DIP (300 MIL)
EconoRAM Time Chip
1
2
3
4
5
6
7
8
– 2.8 to 5.5 Volts
– Interrupt Output
– 3-Wire Reset Input
– 3-Wire Input/Output
– 1-Wire Input/Output
– 3-Wire Clock Input
– No Connection
– Ground
– Battery Backup Input
– Battery Operate Input
– 1 Hz Output
– Crystal Connections
16
15
14
13
12
11
10
9
VCC
X1
X2
GND
NC
1HZ
VBATO
VBATB
DS2404
020998

Related parts for DS2404

DS2404 Summary of contents

Page 1

... With either interface, a strict protocol for accessing the DS2404 ensures data integrity. Utilizing backup energy sources, the data is nonvolatile and allows for stand-alone operation. The DS2404 features can be used to create a stopwatch, alarm clock, time and date stamp, logbook, hour meter, calendar, system power cycle timer, expiration timer, and event scheduler. ...

Page 2

... OVERVIEW The DS2404 has four main data components: 1) 64-bit lasered ROM, 2) 256-bit scratchpad, 3) 4096-bit SRAM, and 4) timekeeping registers. The timekeeping section utilizes an on-chip oscillator that is connected to an external 32.768 kHz crystal. The SRAM and timekeeping registers reside in one contiguous address space referred to hereafter as memory. All data is read and written least significant bit first ...

Page 3

... The “Power Control” section provides for two basic power configurations, battery operate mode and V operate mode. The battery operate mode utilizes one supply connected to V may utilize two supplies; the primary supply connects to V DS2404 BLOCK DIAGRAM Figure 1 COMMUNICATION PORTS Two communication ports are provided, a 1-Wire and a 3-wire port. The advantages of using the 1-Wire port are as follows: 1) provides access to the 64-bit lasered ROM, 2) consists of a single communication signal (I/O), and 3) multiple devices may be connected to the 1-Wire bus ...

Page 4

... LASERED ROM Each DS2404 contains a unique ROM code that is 64 bits long. The first eight bits are a 1-Wire family code (DS2404 code is 04h). The next 48 bits are a unique serial number. The last eight bits are a CRC of the first 56 bits. (See Figure 2.) The 1-Wire CRC is generated using a polynomial generator consisting of a shift register and XOR gates as shown in Figure 3 ...

Page 5

... MEMORY MAP Figure DS2404 020998 ...

Page 6

... I/O line timing has been met. This timing is selected by the DSEL bit in the control register. (See “Status/ Control” section). NOTE: For cycle counter operation, the high level on the I/O pin must be greater than or equal to 70 BATO STOP DS2404 START bit in the control 020998 ...

Page 7

... DSEL START MAN. 0 WPR Write protect real-time clock/alarm registers 1 WPI Write protect interval timer/alarm registers 2 WPC Write protect cycle counter/alarm registers CCF ITE RTE OSC RO WPC DS2404 1 0 ITF RTF 0200h Read Only 1 0 WPI WPR 0201h 020998 ...

Page 8

... Read Only programmable expiration occurs and the read only bit is set to a logic 1, then the DS2404 becomes read only programmable expiration occurs and the read only bit is a logic 0, then only the 64-bit lasered ROM can be accessed (see “Write Protect/Programmable Expiration” section). ...

Page 9

... Anywhere from bytes may be copied to memory with this command. Whole bytes are copied even if only partially written. The AA flag will be cleared only by executing a write scratchpad command T15 T14 T13 T12 DS2404 T11 T10 020998 X ...

Page 10

... MEMORY FUNCTION FLOW CHART Figure DS2404 020998 ...

Page 11

... The ending offset/data status byte is unaffected. The hardware of the DS2404 provides a means to accomplish error-free writing to the memory section. To safeguard reading data in the 1-Wire environment and to simultaneously speed up data transfers recommended to packetize data into data packets of the size of one memory page each ...

Page 12

... WRITE PROTECT/PROGRAMMABLE EXPIRATION The write protect bits (WPR, WPI, WPC) provide a means of write protecting the timekeeping data and limiting access to the DS2404 when an alarm occurs (programmable expiration). The write protect bits may not be written by performing a single copy scratchpad command. Instead, to write these bits, the copy scratchpad command must be performed three times. Please note that the AA bit will be set, as expected, after the first copy command is successfully executed ...

Page 13

... To facilitate this, each device attached to the 1-Wire bus must have open drain or 3-state outputs. The 1-Wire port of the DS2404 (I/O pin 5) is open drain with an internal circuit equivalent to that shown in Figure 8. A multidrop bus consists of a 1-Wire bus with multiple slaves attached ...

Page 14

... This command allows the bus master to read the DS2404’ s 8-bit family code, unique 48-bit serial number, and 8-bit CRC. This command can only be used if there is a single DS2404 on the bus. If more than one slave is present on the bus, a data collision will occur when all slaves try to transmit at the same time (open drain will produce a wired-AND result) ...

Page 15

... Book of DS19xx iButton Standards for a comprehensive discussion of a search ROM, including an actual example. Search Interrupt [ECh] This ROM command works exactly as the normal ROM Search, but it will identify only devices with interrupts that have not yet been acknowledged DS2404 020998 ...

Page 16

... ROM FUNCTIONS FLOW CHART (1-WIRE PORT ONLY) Figure 9 (See Figure DS2404 020998 ...

Page 17

... DS2404. During write time slots, the delay circuit determines when the DS2404 will sample the data line. For a read data time slot “0” transmitted, the delay circuit determines how long the DS2404 will hold the data line low overriding the 1 generated by the master. If the data bit is a “ ...

Page 18

... SLOT < LOW1 < REC < t < 120 s LOW0 SLOT < REC < 120 s SLOT < LOWR 0 t < RELEASE < REC RDV t < DS2404 020998 ...

Page 19

... Wire bus will disarm this type of interrupt alarm condition occurs while the device is disarmed, at first a type 2 interrupt will be produced. Spontaneous interrupts are signaled by the DS2404 by pulling the data line low for 960 to 3840 s as the interrupt condition begins (Figure 12). After this long low pulse a presence pulse will follow. If the alarm condition occurs just after the master has sent a reset pulse, i ...

Page 20

... TYPE 1 INTERRUPT Figure 12 TYPE 1A INTERRUPT (SPECIAL CASE) Figure 13 TYPE 2 INTERRUPT Figure 14 DS2404 DS2404 020998 ...

Page 21

... Command bits and data bits are input on the rising edge of the clock and data bits are output on the falling edge of the clock. When reading data from the DS2404, the DQ pin goes to a high impedance state while the clock is high. Taking communication and cause the DQ pin high impedance state ...

Page 22

... V Operate Mode (Battery Backed) CC Figure 16 shows the necessary connections for operating the DS2404 in V VCC OPERATE MODE Figure BATB V BATO To always allow communication through the 1-Wire or wire port, the voltage on V approximately 3-wire port, the voltage on V Otherwise the DS2404 will retain data, but will not allow any access. ...

Page 23

... This restriction does not apply to the 1-Wire interface. DEVICE OPERATION MODES With its two ports and two power modes the DS2404 can be operated in several ways. While the maximum voltage on the 1-Wire port (I/O) is always 6V, the maximum voltage on the 3-wire port (DQ) depends on the power mode and actual operating voltage ...

Page 24

... In addition, data should be organized as data packets with a length byte at the beginning and a CRC check at the end. Whenever one side has finished communication with the DS2404 it should write a token such as a “null-packet” into the scratchpad. A null-packet consists of three bytes that represent a zero length followed by a valid 16-bit CRC ...

Page 25

... CRYSTAL PLACEMENT ON PCB Figure 18 3-WIRE WRITE DATA TIMING DIAGRAM Figure 19 3-WIRE READ DATA TIMING DIAGRAM Figure DS2404 020998 ...

Page 26

... V SYMBOL MIN TYP CC1 I CC2 (-40°C to +85°C; V SYMBOL MIN TYP BATO I BAT1 I BAT2 DS2404 (- +85 C) MAX UNITS NOTES 5.5 V 1,6 = 5V+ 10%) CC MAX UNITS NOTES 6.0 V 1,9 +0.8 V 1,16 ...

Page 27

... RDV RELEASE REC t 960 INT t 480 RSTH t 480 RSTL t 15 PDH t 60 PDL DS2404 (t = 25°C) A MAX UNITS NOTES 800 pF 8 (-40°C to +85°C) MAX UNITS NOTES 5V+ 10%) CC MAX UNITS NOTES ...

Page 28

... When the battery is attached, the oscillator powers up in the off state. input, V and V must be 0V. BATO CC BATB , 5 s after power has been applied, the parasite capacitance will not affect . may have to be reduced to as much as 0.5V to always IL1MAX pins only DS2404 020998 ...

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