DS1004 Dallas Semiconductor, DS1004 Datasheet

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DS1004

Manufacturer Part Number
DS1004
Description
Manufacturer
Dallas Semiconductor
Datasheet

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FEATURES
DESCRIPTION
The DS1004 is a 5-tap all silicon delay line which can provide 2, 3, 4, or 5 ns tap-to-tap delays within a
standard part family. The device is Dallas Semiconductor’s fastest 5-tap delay line. It is available in a
standard 8-pin DIP and 150 mil 8-pin mini-SOIC. The device features precise leading and trailing edge
accuracies and has the inherent reliability of an all-silicon delay line solution.
The DS1004 is specified for tap-to-tap tolerances as shown in Table 1. Each device has a minimum input-
to-tap 1 delay of 5 ns. Subsequent taps (taps 2 through 5) are precisely delayed by 2, 3, 4, or 5 ns. See
Table 1 for details. Tolerance over temperature and voltage is 1.5 ns. Nominal tap-to-tap tolerances
range from 0.5 ns to 1.0 ns. Each output is capable of driving up to 10 LS loads.
For customers needing non-standard delay values, the Late Package Program (LPP) is available.
Customers may contact Dallas Semiconductor at (972) 371–4348 for further details.
www.dalsemi.com
All-silicon timing circuit
Five equally delayed clock phases per input
Precise tap-to-tap delay tolerances of ±0.5,
±0.75, or ±1 ns
Input-to-tap 1 delay of 5 ns
Delay tolerances of ±1.5 ns over temperature
and voltage
Leading and trailing edge precision preserves
the input symmetry
CMOS design with TTL compatibility
Standard 8-pin DIP and 150 mil 8-pin SOIC
Vapor phase, IR and wave solderable
Available in Tape and Reel
1 of 6
PIN ASSIGNMENT
PIN DESCRIPTION
TAP 1-5
V
GND
IN
CC
TAP 2
TAP 2
TAP 4
TAP 4
DS1004M 8-Pin DIP (300-mil)
DS1004Z 8-Pin SOIC (150-mil)
GND
GND
See Mech. Drawings Section
See Mech. Drawings Section
IN
IN
1
2
3
4
1
2
3
4
- TAP Output Number
- +5 Volt Supply
- Ground
- Input
Silicon Delay Line
5-Tap High Speed
8
7
6
5
8
7
6
5
V
V
TAP 1
TAP 3
TAP 5
TAP 1
TAP 3
TAP 5
CC
CC
DS1004
111799

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DS1004 Summary of contents

Page 1

... Available in Tape and Reel DESCRIPTION The DS1004 is a 5-tap all silicon delay line which can provide tap-to-tap delays within a standard part family. The device is Dallas Semiconductor’s fastest 5-tap delay line available in a standard 8-pin DIP and 150 mil 8-pin mini-SOIC. The device features precise leading and trailing edge accuracies and has the inherent reliability of an all-silicon delay line solution ...

Page 2

... Delay accuracy for both leading and trailing edges. PART NUMBER DELAY TABLE Table 2 PART NUMBER INPUT-TO-TAP1 DS1004M DS1004M DS1004M DS1004M DS1004Z DS1004Z DS1004Z DS1004Z LOGIC DIAGRAM VARIATION INCREMENT OVER TEMP & VOLTAGE ± ...

Page 3

... The input waveform is produced by a precision pulse generator under software control. Time delays are measured by a time interval counter (20 ps resolution) connected to the output. The DS1004 output taps are selected and connected to the interval counter by a VHF switch control unit. All measurements are fully automated with each instrument controlled by the computer over an IEEE 488 bus ...

Page 4

... V = 5.0V ± 5%) CC TYP MAX UNITS 5. 0.8 V 1.0 µA -1 25° ± 5 TYP MAX UNITS ns ns Table 1 ns Table 1 ns 2.0 2.5 ns 100 TYP MAX UNITS 10 pF DS1004 NOTES NOTES 25°C) NOTES ...

Page 5

... Each output is loaded with the equivalent of one 74F04 input gate. Data is measured at the 1.5V level on the rising and falling edge. NOTE: Above conditions are for test only and do not restrict the devices under other data sheet conditions. TIMING DIAGRAM: DS1004 INPUT TO OUTPUTS DS1004 ...

Page 6

... Delay, Rising): The elapsed time between the 1.5V point on the leading edge of the input PLH pulse and the 1.5V point on the leading edge of the output pulse. t (Time Delay, Falling): The elapsed time between the 1.5V point on the falling edge of the input PHL pulse and the 1.5V point on the falling edge of the output pulse DS1004 ...

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