MPC8275 Motorola, MPC8275 Datasheet
MPC8275
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MPC8275 Summary of contents
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... This document contains detailed information about power considerations, DC/AC electrical characteristics, and AC timing specifications for .13µm (HiP7) members of the PowerQUICC II™ family of integrated communications processors—the MPC8280, the MPC8275, and the MPC8270 (collectively called 'the MPC8280' throughout this document ). The following topics are addressed: Topic Section 1, “ ...
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... VR (516 PBGA—Lead free) (516 PBGA—Lead spheres) MPC8275VR MPC8270VR MPC8275 MPC8280 516 PBGA 480 TBGA 4 4 — — Yes Yes — Yes — Yes 1 1 — — ZQ MPC8275ZQ MPC8270ZQ MOTOROLA ...
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... MPC8280 only (not on MPC8270, the VR package, nor the ZQ package) 2 MPC8280 has 2 serial interface (SI) blocks and 8 TDM ports. MPC8270 and the VR and ZQ packages have only 1 SI block and 4 TDM ports (TDM2[A–D]). 3 MPC8280, MPC8275VR, MPC8275ZQ only (not on MPC8270, MPC8270VR, nor MPC8270ZQ) 1.1 Features The major features of the MPC8280 are as follows: • ...
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... MPC8280) required by the PCI standard as well as message and doorbell registers — Supports the I O standard 2 — Hot-swap friendly (supports the hot swap specification as defined by PICMG 2.1 R1.0 August 3, 1998) 4 MPC8280 PowerQUICC II™ Family Hardware Specifications l capabilities MOTOROLA ...
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... Each MCC handles 128 serial, full-duplex, 64-Kbps data channels. Each MCC can be split into four subgroups of 32 channels each. – Almost any combination of subgroups can be multiplexed to single or multiple TDM interfaces up to four TDM interfaces per MCC MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications Overview 5 ...
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... Multiple-master, single-master, and slave modes — eight TDM interfaces (four on the MPC8270) – Supports two groups of four TDM channels for a total of eight TDMs (one group of four on the MPC8270 and the MPC8275) – 2,048 bytes of SI RAM – Bit or byte resolution 6 MPC8280 PowerQUICC II™ ...
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... Independent transmit and receive routing, frame synchronization – Supports T1, CEPT, T1/E1, T3/E3, pulse code modulation highway, ISDN basic rate, ISDN primary rate, Motorola interchip digital link (IDL), general circuit interface (GCI), and user-defined TDM serial interfaces — Eight independent baud rate generators and 20 input clock pins for supplying clocks to FCCs, SCCs, SMCs, and serial channels — ...
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... IN 8 MPC8280 PowerQUICC II™ Family Hardware Specifications – 105 Not to exceed 10 SDRAM_CLK Table 5. DC Electrical Characteristics Symbol IHC V ILC Min Max 2.0 3.465 GND 0.8 2.4 3.465 GND 0.4 — 10 MOTOROLA Unit µA ...
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... Output high voltage – except UTOPIA mode, and open drain pins 4 In UTOPIA mode (UTOPIA pins only): I PA[0-31] PB[4-31] PC[0-31] PD[4-31 UTOPIA mode (UTOPIA pins only): I PA[0-31] PB[4-31] PC[0-31] PD[4-31] MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications Symbol 3 = VDDH -8.0mA OH = 8.0mA V OL ...
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... DBG DBB/IRQ3 D[0-63] DP(0)/RSRV/EXT_BR2 DP(1)/IRQ1/EXT_BG2 DP(2)/TLBISYNC/IRQ2/EXT_DBG2 DP(3)/IRQ3/EXT_BR3/CKSTP_OUT DP(4)/IRQ4/EXT_BG3/CORE_SREST DP(5)/TBEN/EXT_DBG3/IRQ5/CINT DP(6)/CSE(0)/IRQ6 DP(7)/CSE(1)/IRQ7 PSDVAL TA TEA GBL/IRQ1 CI/BADDR29/IRQ2 WT/BADDR30/IRQ3 L2_HIT/IRQ4 CPU_BG/BADDR31/IRQ5/CINT CPU_DBG CPU_BR IRQ0/NMI_OUT IRQ7/INT_OUT/APE PORESET HRESET SRESET RSTCONF 10 MPC8280 PowerQUICC II™ Family Hardware Specifications 1 (Continued) Symbol Min Max V — 0.4 OL Unit V MOTOROLA ...
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... DC current recommended to either pull unused pins to GND or VDDH configure them as outputs. 2 TRST and PORESET should be tied to VDDH via a 2K Ω external pull-up resistor. 3 The leakage current is measured for nominal VDDH,VCCSYN, and VDD. 4 MPC8280, MPC8275VR, MPC8275ZQ only MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications DC Electrical Characteristics 1 (Continued) ...
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... °C can be obtained from the following equation: J × – are possible × PI/O, where PI/O is the DD DD Unit Air Flow Natural convection °C/W 1 m/s Natural convection °C/W 1 m/s °C/W — °C/W — °C/W — MOTOROLA ...
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... GND circuits. Pull up all unused inputs or signals that will be inputs during reset. CC Special care should be taken to minimize the noise levels on the PLL supply pins. MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications ) can be used to determine the junction temperature with a JT × ...
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... Factor 166 3.5 166 4 200 4 233 4.5 250 4 250 4.5 292 5 300 4 300 4.5 Table 8. Output Buffer Impedances 1 2,3 P (W) INT CPU Vddl 1.5 Volts Nominal Maximum 233 0.95 1.0 266 1.0 1.05 266 1.05 1.1 300 1.05 1.15 333 1.25 1.35 375 1.3 1.4 417 1.45 1.55 400 1.5 1.6 450 1.55 1.65 1 Typical Impedance (Ω MOTOROLA ...
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... Timings are measured at the pin. Although the specifications generally reference the rising edge of the clock, the following AC timing diagrams also apply when the falling edge is the active edge. MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications AC Electrical Characteristics 1 Value (ns) ...
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... FCC input signals FCC output signals Note: When GFMR[TCI FCC output signals Note: When GFMR[TCI MPC8280 PowerQUICC II™ Family Hardware Specifications sp17a sp36a/sp37a Figure 3. FCC Internal Clock Diagram sp17b sp36b/sp37b Figure 4. FCC External Clock Diagram sp36a/sp37a sp36b/sp37b MOTOROLA ...
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... Input sampled on the rising edge and output driven on the falling edge. 3. Input sampled on the falling edge and output driven on the falling edge. 4. Input sampled on the falling edge and output driven on the rising edge. Figure 6. SCC/SMC/SPI/I MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications 2 C external clock. ...
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... Note: TGATE is asserted on the rising edge of the clock deasserted on the falling edge. Figure 8. PIO and Timer Signal Diagram 18 MPC8280 PowerQUICC II™ Family Hardware Specifications sp20 sp21 sp40/sp41 Figure 7. TDM Signal Diagram Sys clk sp22 (See note) (See note) sp23 sp23 sp22 sp42/sp43 sp42/sp43 sp42a/sp43a MOTOROLA ...
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... All other pins 1 Input specifications are measured from the 50% level of the signal to the 50% level of the rising edge of CLKIN. Timings are measured at the pin. MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications NOTE: CLKIN Jitter and Duty Cycle NOTE: PCI AC Timing ...
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... Activating data pipelining (setting BRx[DR] in the memory controller) improves the AC timing. 20 MPC8280 PowerQUICC II™ Family Hardware Specifications 1 Value (ns) Maximum Delay 66 MHz 83 MHz 100 MHz 66 MHz 7 6 5.5 8 6.5 5.5 6.5 6.5 5.5 6 5.5 5.5 6 5.5 5.5 6 5.5 5 NOTE Minimum Delay 83 MHz 100 MHz 0.7 0.7 0 MOTOROLA ...
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... DATA bus normal mode input signal All other input signals PSDVAL/TEA/TA output signals ADD/ADD_atr/BADDR/CI/ GBL/WT output signals DATA bus output signals All other output signals (except AP) AP signals MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications sp11 sp11a sp12 sp15 sp31 sp32 sp33a sp35 sp35a Figure 9 ...
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... T3 at the falling edge, of CLKin. However, the spacing of T2 and T4 depends on the PLL clock ratio selected, as shown in Table 13. 22 MPC8280 PowerQUICC II™ Family Hardware Specifications sp13 sp13a sp14 sp14a sp33b Figure 10. Parity Mode Diagram sp34/sp30 Figure 11. MEMC Mode Diagram NOTE sp10 sp10 sp10 sp10 sp30 MOTOROLA ...
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... Pins PCI_MODE PCI_CFG[0] PCI_MODCK 1 — Determines PCI clock frequency range. Refer to Sections 7.2 and 7.3. MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications Tick Spacing (T1 Occurs at the Rising Edge of CLKin 1/4 CLKin 1/2 CLKin 3/10 CLKin 1/2 CLKin 4/14 CLKin 1/2 CLKin ...
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... MOTOROLA high 533.3 666.7 400.0 500.0 417.5 501.0 400.0 480.0 668.0 835.0 1002.0 533.3 666.7 733.3 800.0 ...
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... MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications 3 CPM Clock CPM (MHz) Multiplication 4 Factor high low 100.0 4 250.0 100.0 4 200.0 100.0 4 166.7 100.0 4 142.9 100.0 4 133.3 Reserved 80 ...
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... Reserved Reserved Reserved 1 (Continued) CPU Clock CPU (MHz) Multiplication 5 Factor high low 400.0 3 166.7 400.0 3.5 250.0 400.0 4 250.0 400.0 4.5 250.0 400.0 3.5 250.0 400.0 4 250.0 400.0 4.5 250.0 400.0 5 250.0 400.0 5.5 250.0 MOTOROLA high 400.0 466.7 533.3 600.0 400.0 457.1 514.3 571.4 628.6 ...
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... MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications NOTE: PCI_MODCK NOTE: Tval (Output Hold) CPM Clock CPU (MHz) Multiplication 5 6 Factor low high Default Modes (MODCK_H=0000) 2 133.3 133.3 2.5 2 133.3 133.3 3 2.5 150 ...
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... MOTOROLA ...
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... MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications CPM Clock CPU (MHz) Multiplication 5 6 Factor low high 3 200.0 266.6 4.5 3 200.0 266.6 ...
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... CPU Clock PCI (MHz) Division 6 Factor low high 166.7 250.0 4 200.0 300.0 4 180.0 360.0 6 250.0 420.0 6 250.0 480.0 6 MOTOROLA PCI Clock (MHz) low high 50.0 66.7 50.0 66.7 50.0 66.7 50.0 66.7 50.0 66.7 50.0 66.7 50.0 66.7 PCI Clock (MHz) low high 33.3 50.0 33.3 50.0 25.0 50.0 29.8 50.0 26.0 50.0 ...
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... MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications CPM Clock CPM CPU (MHz) Multiplication 5 Factor low high 3 166.7 300 214.3 300.0 3.5 3 187.5 300.0 4 Full Configuration Modes 3 150.0 300.0 ...
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... MOTOROLA PCI Clock (MHz) low high 27.8 50.0 25.0 50.0 29.8 50.0 26.0 50.0 25.0 50.0 25.0 50.0 25.0 50.0 27.8 50.0 35.7 50.0 31.3 50.0 27.8 50.0 25.0 50.0 26.8 50.0 25.0 50.0 25.0 50.0 25.0 50.0 25.0 50.0 31.3 50.0 27.3 50.0 25.0 50.0 29.2 50.0 26.5 50.0 25.0 50.0 ...
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... MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications CPM Clock CPM CPU (MHz) Multiplication 5 Factor low high 2 150.0 300 150.0 300.0 2.5 2 150.0 300 150.0 300.0 3 ...
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... Full Configuration Modes Reserved 1,2 CPU Clock (MHz) Bus Division 5 Factor low high 166.7 166.7 2 200.0 200.0 2 166.7 200.0 3 250.0 266.6 3 180.0 240.0 2.5 250.0 280.0 2.5 250.0 311.1 3 240.0 320.0 2.5 MOTOROLA Bus Clock (MHz) low high 66.7 66.7 66.7 66.7 55.5 66.7 62.5 66.7 60.0 80.0 71.4 80.0 71.4 88.9 80.0 106.7 ...
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... MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications CPM Clock CPU (MHz) Multiplication 4 5 Factor low high Reserved Reserved 2 133.3 133 150.0 200 178.6 200.0 3.5 3 156.3 200.0 ...
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... MOTOROLA high 88.9 80.0 80.0 80.0 80.0 80.0 66.7 66.7 88.9 88.9 88.9 88.9 ...
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... MODCK_H = hard reset configuration word [28–31]. MODCK[1-3] = three hardware configuration pins. 4 CPM multiplication factor = CPM clock/PCI clock 5 CPU multiplication factor = Core PLL multiplication factor MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications CPM Clock CPU (MHz) Multiplication 4 ...
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... MOTOROLA high 50.0 50.0 50.0 50.0 66.7 66.7 66.7 ...
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... MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications CPM Clock CPU (MHz) Multiplication 4 5 Factor low high 5 139.0 250 178.6 250.0 3.5 5 156.3 250 138.9 250.0 4.5 5 133 ...
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... MOTOROLA high 83.3 83.3 83.3 83.3 ...
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... ZU Package—MPC8280 and MPC8270 The following figures and table represent the standard 480 TBGA package. For information on the alternate package, refer to Section 8.2, “VR and ZQ Packages—MPC8275 and MPC8270” on page 56. Figure 13 shows the pinout of the ZU package as viewed from the top surface. ...
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... Figure 14. Side View of the TBGA Package 42 MPC8280 PowerQUICC II™ Family Hardware Specifications View Die Attach Die Glob-Top Filled Area Glob-Top Dam Copper Traces Wire Bonds Pressure Sensitive Adhesive Etched Cavity MOTOROLA ...
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... A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications Pin Name MPC8280 only Pinout Ball ...
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... D8 D9 D10 D11 D12 D13 D14 D15 44 MPC8280 PowerQUICC II™ Family Hardware Specifications Pin Name MPC8280 only Ball B20 A18 A16 A13 E12 A20 E17 B15 B13 A11 MOTOROLA ...
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... D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications Pin Name MPC8280 only Pinout Ball D19 D17 D15 C13 B11 C19 C17 C15 D13 ...
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... CPU_BR CS0 CS1 46 MPC8280 PowerQUICC II™ Family Hardware Specifications Pin Name MPC8280 only Ball B14 C12 B10 B18 B16 E14 D12 C10 B22 A22 E21 D21 C21 B21 A21 E20 V3 C22 F25 C29 MOTOROLA ...
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... PWE3/PSDDQM3/PBS3 PWE4/PSDDQM4/PBS4 PWE5/PSDDQM5/PBS5 PWE6/PSDDQM6/PBS6 PWE7/PSDDQM7/PBS7 PSDA10/PGPL0 PSDWE/PGPL1 POE/PSDRAS/PGPL2 PSDCAS/PGPL3 PGTA/PUPMWAIT/PGPL4/PPBS PSDAMUX/PGPL5 LWE0/LSDDQM0/LBS0/PCI_CFG0 LWE1/LSDDQM1/LBS1/PCI_CFG1 LWE2/LSDDQM2/LBS2/PCI_CFG2 LWE3/LSDDQM3/LBS3/PCI_CFG3 LSDA10/LGPL0/PCI_MODCKH0 LSDWE/LGPL1/PCI_MODCKH1 MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications Pin Name MPC8280 only Pinout Ball E27 E28 F26 F27 F28 G25 D29 E29 F29 G28 T5 ...
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... MPC8280 PowerQUICC II™ Family Hardware Specifications Pin Name MPC8280 only Ball E26 D25 C26 B27 D28 N27 T29 R27 R26 R29 R28 W29 P28 N26 AA27 P29 AA26 N25 AA25 AB29 AB28 P25 AB27 H29 J29 J28 J27 J26 J25 K25 L29 L27 L26 L25 MOTOROLA ...
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... LCL_DP0/C0/BE0 LCL_DP1/C1/BE1 LCL_DP2/C2/BE2 LCL_DP3/C3/BE3 IRQ0/NMI_OUT IRQ7/INT_OUT/APE 1 TRST TCK TMS TDI TDO TRIS 1 PORESET MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications Pin Name MPC8280 only Pinout Ball M29 M28 M27 M26 N29 T25 U27 U26 U25 V29 ...
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... FCC1_UT8_RXD1/FCC1_UT16_RXD9 FCC1_UT8_RXD2/ FCC1_UT16_RXD10 FCC1_UT8_RXD3/ FCC1_UT16_RXD11 FCC1_UT8_RXD4/ FCC1_UT16_RXD12 FCC1_UT8_RXD5/ FCC1_UT16_RXD13 FCC1_UT8_RXD6/ FCC1_UT16_RXD14 FCC1_UT8_RXD7/ FCC1_UT16_RXD15 FCC1_UT8_TXD7/FCC1_UT16_TXD15 Ball AH5 AF6 AA3 AJ4 AH4 2 AC29 2 AC25 2 AE28 2 AG29 2 AG28 2 AG26 2 AE24 2 AH25 2 AF23 2 AH23 2 AE22 2 AH22 2 AJ21 2 AH20 2 AG19 2 AF18 2 AF17 2 AE16 2 AJ16 MOTOROLA ...
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... FCC3_RMII_TXD1/ L1RXDA2/L1RXD0A2 PB7/FCC3_MII_HDLC_TXD0/ FCC3_RMII_TXD0/ FCC3_TXD/L1TXDA2/L1TXD0A2 PB8/FCC3_MII_HDLC_RXD0/ FCC3_RMII_RXD0/ FCC3_RXD/TXD3 PB9/FCC3_MII_HDLC_RXD1/ FCC3_RMII_RXD1/L1TXD2A2 PB10/FCC3_MII_HDLC_RXD2 PB11/FCC3_MII_HDLC_RXD3 PB12/FCC3_MII_CRS/TXD2 PB13/FCC3_MII_COL/L1TXD1A2 PB14/FCC3_MII_RMII_TX_EN//RXD3 PB15/FCC3_MII_TX_ER/RXD2 MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications Pin Name MPC8280 only FCC1_UT8_TXD6/FCC1_UT16_TXD14 FCC1_UT8_TXD5/FCC1_UT16_TXD13 FCC1_UT8_TXD4/FCC1_UT16_TXD12 FCC1_UT8_TXD3/FCC1_UT16_TXD11 FCC1_UT8_TXD2/FCC1_UT16_TXD10 FCC1_UT8_TXD1/FCC1_UT16_TXD9 FCC1_UT8_TXD0/FCC1_UT16_TXD8 FCC1_UTM_RXCLAV/ FCC1_UTS_RXCLAV FCC1_UT_RXSOC FCC1_UTM_RXENB/ FCC1_UTS_RXENB ...
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... FCC2_UT8_RXD4 FCC2_UT8_RXD5 FCC2_UT8_RXD6/L1TXD1A1 FCC2_UT8_RXD7/L1TXD2A1 FCC2_UT8_TXD7/L1RXD1A1 FCC2_UT8_TXD6/L1RXD2A1 FCC2_UT8_TXD5/L1RXD3A1 FCC2_UT8_TXD4/L1TXD3A1 FCC2_UT8_TXD1 FCC2_UT8_TXD0 FCC2_UTM_RXCLAV/ FCC2_UTS_RXCLAV FCC2_UT_TXSOC FCC2_UT_RXSOC FCC2_UT8_TXD3 FCC2_UT8_TXD2 FCC2_UTM_RXENB/ FCC2_UTS_RXENB Ball 2 AJ18 2 AJ17 2 AE14 2 AF13 2 AG12 2 AH11 2 AH16 2 AE15 2 AJ9 2 AE9 2 AJ7 2 AH6 2 AE3 2 AE2 2 AC5 2 AC4 2 AB26 2 AD29 2 AE29 2 AE27 2 AF27 MOTOROLA ...
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... PC16/CLK16/TIN4 PC17/CLK15/TIN3/BRGO8 PC18/CLK14/TGATE2 PC19/CLK13/BRGO7/SPICLK PC20/CLK12/TGATE1/USB_OE PC21/CLK11/BRGO6 PC22/CLK10/DONE1/FCC1_UT_TXPRTY PC23/CLK9/BRGO5/DACK1 PC24/CLK8/TOUT4 PC25/CLK7/BRGO4 PC26/CLK6/TOUT3/TMCLK PC27/FCC3_TXD/FCC3_MII_TXD0/ FCC3_RMII_TXD0/CLK5/BRGO3 PC28/CLK4/TIN1/TOUT2/CTS2/CLSN2/ FCC2_RXADDR4 PC29/CLK3/TIN2/BRGO2/CTS1/CLSN1 MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications Pin Name MPC8280 only FCC2_UTM_TXCLAV/ FCC2_UTS_TXCLAV L1CLKOC1/FCC1_UTM_RXADDR2/ FCC1_UTS_RXADDR2/ FCC1_UTM_RXCLAV1 L1RQC1/FCC1_UTM_TXADDR2/ FCC1_UTS_TXADDR2/ FCC1_UTM_TXCLAV1 FCC1_UT16_TXD0 FCC1_UT16_TXD1 FCC1_UT16_TXD2/SI1_L1ST4/ FCC2_UT8_RXD3 L1CLKOD1/FCC2_UT8_RXD2 ...
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... FCC1_UTS_RXADDR4/ FCC1_UTM_RXCLAV3/ FCC2_UTM_RXADDR3/ FCC2_UTS_RXADDR0 FCC1_UTM_TXADDR4/ FCC1_UTS_TXADDR4/ FCC1_UTM_TXCLAV3/ FCC2_UTM_TXADDR3/ FCC2_UTS_TXADDR0 FCC1_UT16_RXD2 FCC1_UT16_RXD3 FCC1_UT16_TXD5 FCC1_UT16_RXD4/L1RSYNCD1 FCC1_UT16_RXD5/L1RXDD1 FCC1_UT16_TXD6/L1TXDD1 Ball 2 AE1 2 AD1 2 AC28 2 AD27 2 AF29 2 AF28 2 AG25 2 AH26 2 AJ27 2 AJ23 2 AG23 2 AJ22 2 AE20 2 AJ20 2 AG18 2 AG17 2 AF16 2 AH15 2 AJ14 2 AH13 2 AJ12 2 AE12 2 AF10 2 AG9 MOTOROLA ...
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... DC current recommended to either pull unused pins to GND or VDDH configure them as outputs. 3 Must be pulled down or left floating PCI is not desired, must be pulled up or left floating. 5 Sphere is not connected to die. MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications Pin Name MPC8280 only FCC1_UT16_RXD6/L1RSYNCC1 FCC1_UT16_RXD7/L1RXDC1 FCC1_UT16_TXD7/L1TXDC1 ...
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... Indicates that a signal is part of the reduced media independent interface. 8.2 VR and ZQ Packages—MPC8275 and MPC8270 The following figures and table represent the alternate 516 PBGA package. For information on the standard package for the MPC8280 and the MPC8270, refer to Section 8.1, “ZU Package—MPC8280 and MPC8270” ...
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... Figure 16 shows the side profile of the PBGA package to indicate the direction of the top surface view. Transfer molding compound Plated substrate via 1 mm pitch Figure 16. Side View of the PBGA Package Remove MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications Die Wire bonds attach ...
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... PowerQUICC II packages. Users should consult “Motorola PowerQUICC II™ Pb-Free Packaging Information” (MPC8250PBFREEPKG) available at www.motorola.com/semiconductors. Table 22 shows the pinout list of the MPC8275 and MPC8270. Table 21 defines conventions and acronyms used in Table 22. Table 22. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List MPC8275/MPC8270 ...
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... Table 22. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (Continued) MPC8275/MPC8270 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 TT0 TT1 TT2 TT3 TT4 TBST TSIZ0 TSIZ1 TSIZ2 TSIZ3 AACK ARTRY DBG DBB/IRQ3 MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications ...
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... Table 22. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (Continued) MPC8275/MPC8270 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 ...
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... Table 22. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (Continued) MPC8275/MPC8270 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 DP0/RSRV/EXT_BR2 IRQ1/DP1/EXT_BG2 IRQ2/DP2/TLBISYNC/EXT_DBG2 IRQ3/DP3/CKSTP_OUT/EXT_BR3 IRQ4/DP4/CORE_SRESET/EXT_BG3 IRQ5/CINT/DP5/TBEN/EXT_DBG3 IRQ6/DP6/CSE0 IRQ7/DP7/CSE1 PSDVAL TA TEA GBL/IRQ1 ...
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... Table 22. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (Continued) MPC8275/MPC8270 L2_HIT/IRQ4 CPU_BG/BADDR31/IRQ5/CINT CPU_DBG CPU_BR CS0 CS1 CS2 CS3 CS4 CS5 CS6 CS7 CS8 CS9 CS10/BCTL1 CS11/AP0 BADDR27 BADDR28 ALE BCTL0 PWE0/PSDDQM0/PBS0 PWE1/PSDDQM1/PBS1 PWE2/PSDDQM2/PBS2 PWE3/PSDDQM3/PBS3 PWE4/PSDDQM4/PBS4 PWE5/PSDDQM5/PBS5 PWE6/PSDDQM6/PBS6 PWE7/PSDDQM7/PBS7 PSDA10/PGPL0 PSDWE/PGPL1 POE/PSDRAS/PGPL2 ...
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... Table 22. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (Continued) MPC8275/MPC8270 LWE0/LSDDQM0/LBS0/PCI_CFG0 LWE1/LSDDQM1/LBS1/PCI_CFG1 LWE2/LSDDQM2/LBS2/PCI_CFG2 LWE3/LSDDQM3/LBS3/PCI_CFG3 LSDA10/LGPL0/PCI_MODCKH0 LSDWE/LGPL1/PCI_MODCKH1 LOE/LSDRAS/LGPL2/PCI_MODCKH2 LSDCAS/LGPL3/PCI_MODCKH3 LGTA/LUPMWAIT/LGPL4/LPBS LGPL5/LSDAMUX/PCI_MODCK LWR L_A14/PAR L_A15/FRAME/SMI L_A16/TRDY L_A17/IRDY/CKSTP_OUT L_A18/STOP L_A19/DEVSEL L_A20/IDSEL L_A21/PERR L_A22/SERR L_A23/REQ0 L_A24/REQ1/HSEJSW L_A25/GNT0 L_A26/GNT1/HSLED L_A27/GNT2/HSENUM L_A28/RST/CORE_SRESET L_A29/INTA L_A30/REQ2 L_A31/DLLOUT LCL_D0/AD0 LCL_D1/AD1 ...
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... Table 22. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (Continued) MPC8275/MPC8270 LCL_D5/AD5 LCL_D6/AD6 LCL_D7/AD7 LCL_D8/AD8 LCL_D9/AD9 LCL_D10/AD10 LCL_D11/AD11 LCL_D12/AD12 LCL_D13/AD13 LCL_D14/AD14 LCL_D15/AD15 LCL_D16/AD16 LCL_D17/AD17 LCL_D18/AD18 LCL_D19/AD19 LCL_D20/AD20 LCL_D21/AD21 LCL_D22/AD22 LCL_D23/AD23 LCL_D24/AD24 LCL_D25/AD25 LCL_D26/AD26 LCL_D27/AD27 LCL_D28/AD28 LCL_D29/AD29 LCL_D30/AD30 LCL_D31/AD31 LCL_DP0/C0/BE0 LCL_DP1/C1/BE1 ...
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... Table 22. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (Continued) MPC8275/MPC8270 TCK TMS TDI TDO TRIS 1 PORESET HRESET SRESET QREQ RSTCONF MODCK1/AP1/TC0/BNKSEL0 MODCK2/AP2/TC1/BNKSEL1 MODCK3/AP3/TC2/BNKSEL2 CLKIN1 PA0/RESTART1/DREQ3 PA1/REJECT1/DONE3 PA2/CLK20/DACK3 PA3/CLK19/DACK4/L1RXD1A2 PA4/REJECT2/DONE4 PA5/RESTART2/DREQ4 PA6 PA7/SMSYN2 PA8/SMRXD2 PA9/SMTXD2 PA10/MSNUM5 PA11/MSNUM4 PA12/MSNUM3 PA13/MSNUM2 PA14/FCC1_MII_HDLC_RXD3 PA15/FCC1_MII_HDLC_RXD2 PA16/FCC1_MII_HDLC_RXD1/ ...
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... Table 22. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (Continued) MPC8275/MPC8270 PA17/FCC_MII_HDLC_RXD0/ FCC1_MII_TRAN_RXD/ FCCI_RMII_RXD0 PA18/FCC1_MII_HDLC_TXD0/ FCC1_MIITRAN_TXD/ FCC1_RMII_TXD0 PA19/FCC1_MII_HDLC_TXD1/ FCC1_RMII_TXD1 PA20/FCC1_MII_HDLC_TXD2 PA21/FCC1_MII_HDLC_TXD3 PA22 PA23 PA24/MSNUM1 PA25/MSNUM0 PA26/FCC1_MII_RMII_RX_ER/ PA27/FCC1_MII_RX_DV/ FCC1_RMII_CRS_DV PA28/FCC1_MII_TX_EN/ FCC1_RMII_TX_EN PA29/FCC1_MII_TX_ER PA30/FCC1_MII_CRS/FCC1_RTS PA31/FCC1_MII_COL PB4/FCC3_MII_HDLC_TXD3/ L1RSYNCA2/FCC3_RTS PB5/FCC3_MII_HDLC_TXD2/ L1TSYNCA2/L1GNTA2 PB6/FCC3_MII_HDLC_TXD1/ FCC3_RMII_TXD1/ L1RXDA2/L1RXD0A2 PB7/FCC3_MII_HDLC_TXD0/ FCC3_RMII_TXD0/ ...
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... Table 22. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (Continued) MPC8275/MPC8270 PB11/FCC3_MII_HDLC_RXD3 PB12/FCC3_MII_CRS/TXD2 PB13/FCC3_MII_COL/L1TXD1A2 PB14/FCC3_MII_RMII_TX_EN/RXD3 PB15/FCC3_MII_TX_ER/RXD2 PB16/FCC3_MII_RMII_RX_ER/CLK18 PB17/FCC3_MII_RX_DV/CLK17/ FCC3_RMII_CRS_DV PB18/FCC2_MII_HDLC_RXD3/ L1CLKOD2/L1RXD2A2 PB19FCC2_MII_HDLC_RXD2/ L1RQD2/L1RXD3A2 PB20/FCC2_MII_HDLC_RMII_RXD1/ L1RSYNCD2 PB21//FCC2_MII_HDLC_RMII_RXD0/ FCC2_TRAN_RXD/L1TSYNCD2/ L1GNTD2 PB22/FCC2_MII_HDLC_RMII_TXD0/ FCC2_TXD/FCC2_RMII_TXD0/ L1RXDD2 PB23/FCC2_MII_HDLC_TXD1/ L1RXD2A1/L1TXDD2/ FCC2_RMII_TXD1 PB24/FCC2_MII_HDLC_TXD2/ L1RSYNCC2 PB25/FCC2_MII_HDLC_TXD3/ L1TSYNCC2/L1GNTC2 PB26/FCC2_MII_CRS/L1RXDC2 PB27/FCC2_MII_COL/L1TXDC2 PB28/FCC2_MII_RX_ER/FCC2_RMII_RX_ER/ ...
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... Table 22. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (Continued) MPC8275/MPC8270 PC3/FCC3_CTS/DACK2/CTS4/ USB_RP PC4/SI2_L1ST4/FCC2_CD PC5/SI2_L1ST3/FCC2_CTS PC6/FCC1_CD PC7/FCC1_CTS PC8/CD4/RENA4/SI2_L1ST2/CTS3/ USB_RN PC9/CTS4/CLSN4/SI2_L1ST1/ L1TSYNCA2/L1GNTA2/USB_RP PC10/CD3/RENA3 PC11/CTS3/CLSN3/L1TXD3A2 PC12/CD2/RENA2 PC13/CTS2/CLSN2 PC14/CD1/RENA1 PC15/CTS1/CLSN1/SMTXD2 PC16/CLK16/TIN4 PC17/CLK15/TIN3/BRGO8 PC18/CLK14/TGATE2 PC19/CLK13/BRGO7/SPICLK PC20/CLK12/TGATE1/USB_OE PC21/CLK11/BRGO6 PC22/CLK10/DONE1 PC23/CLK9/BRGO5/DACK1 PC24/CLK8/TOUT4 PC25/CLK7/BRGO4 PC26/CLK6/TOUT3/TMCLK PC27/FCC3_TXD/FCC3_MII_TXD0/ FCC3_RMII_TXD0/CLK5/BRGO3 68 MPC8280 PowerQUICC II™ Family Hardware Specifications ...
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... Table 22. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (Continued) MPC8275/MPC8270 PC28/CLK4/TIN1/TOUT2/CTS2/CLSN2 FCC2_UT_RXADDR4 PC29/CLK3/TIN2/BRGO2/CTS1/CLSN1 PC30/CLK2/TOUT1 PC31/CLK1/BRGO1 PD4/BRGO8/FCC3_RTS/SMRXD2 PD5/DONE1 PD6/DACK1 PD7/SMSYN1/FCC1_TXCLAV2 PD8/SMRXD1/BRGO5 PD9/SMTXD1/BRGO3 PD10/L1CLKOB2/BRGO4 PD11/L1RQB2 PD12 PD13 PD14/L1CLKOC2/I2CSCL PD15/L1RQC2/I2CSDA PD16/SPIMISO PD17/BRGO2/SPIMOSI PD18/SPICLK PD19/SPISEL/BRGO1 PD20/RTS4/TENA4/L1RSYNCA2/ USB_TP PD21/TXD4/L1RXD0A2/L1RXDA2/ USB_TN PD22/RXD4L1TXD0A2/L1TXDA2/ USB_RXD PD23/RTS3/TENA3 PD24/TXD3 MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications ...
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... Table 22. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (Continued) MPC8275/MPC8270 PD25/RXD3 PD26/RTS2/TENA2 PD27/TXD2 PD28/RXD2 PD29/RTS1/TENA1 PD30/TXD1 PD31/RXD1 VCCSYN VCCSYN1 CLKIN2 3 SPARE4 4 PCI_MODE 3 SPARE6 5 No connect I/O power Core Power Ground 70 MPC8280 PowerQUICC II™ Family Hardware Specifications Pin Name MPC8275 only FCC1_UT16_TXD6 ...
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... GND with the noise filtering capacitors. 7 XFC (A18) pin: This pin is used in MPC826x(A) devices not used in MPC8275/MPC8270 because there is no need for external capacitor to operate the PLL. New designs should connect A18 (XFC) pin to GND. Old designs in which the MPC8275/MPC8270 is used as a drop-in replacement can leave the pin connected to the current capacitor ...
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... Dimensions in millimeters. 3. Dimension b is measured at the maximum solder ball diameter, parallel to primary data A. 4. Primary data A and the seating plane are defined by the spherical crowns of the solder balls. Millimeters Dim Min Max A 1.45 1.65 A1 0.60 0.70 A2 0.85 0.95 A3 0.25 — b 0.65 0.85 D 37.50 BSC D1 35.56 REF e 1.27 BSC E 37.50 BSC E1 35.56 REF MOTOROLA ...
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... Figure 18. Mechanical Dimensions and Bottom Surface Nomenclature—516 PBGA MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications Package Description 73 ...
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... Removal of notes stating “no local bus” on VR-package devices. The MPC8270VR and the MPC8275VR have local bus support. • References to “G2 core” changed to “G2_LE core.” Refer to the G2 Core Reference Manual (G2CORERM/D). • Addition of VCCSYN to “Note” below Table 4, and to note 3 of Table 5 • ...
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... PA[6–9], PB[8–17, 20–25], PC[6–7, 10–13], PD[4, 10–13, 16, 23–28] • Table 22: Addition of critical interrupt (CINT) to AC1 and B14. Previously omitted. • Table 22: Addition of note 5 to ‘No connect’ (E17, C23) MOTOROLA MPC8280 PowerQUICC II™ Family Hardware Specifications Table 24. Document Revision History Substantive Changes for 60x signals to 6 ...
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... Motorola was negligent regarding the design or manufacture of the part. Motorola and the Stylized M Logo are registered in the U.S. Patent and Trademark Office. digital dna is a trademark of Motorola, Inc. The described product contains a PowerPC processor core ...