MBM29F400TC-70PFTN Fujitsu, MBM29F400TC-70PFTN Datasheet

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MBM29F400TC-70PFTN

Manufacturer Part Number
MBM29F400TC-70PFTN
Description
Manufacturer
Fujitsu
Datasheet

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FUJITSU SEMICONDUCTOR
FLASH MEMORY
CMOS
4M (512K
MBM29F400TC
Embedded Erase
FEATURES
• Single 5.0 V read, write, and erase
• Compatible with JEDEC-standard commands
• Compatible with JEDEC-standard world-wide pinouts
• Minimum 100,000 write/erase cycles
• High performance
• Sector erase architecture
• Boot Code Sector Architecture
• Embedded Erase
• Embedded Program
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/Busy output (RY/BY)
• Low Vcc write inhibit
• Erase Suspend/Resume
• Hardware RESET pin
• Sector protection
• Temporary sector unprotection
DATA SHEET
Minimizes system level power requirements
Uses same software commands as E
48-pin TSOP (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)
44-pin SOP (Package suffix: PF)
55 ns maximum access time
One 16K byte, two 8K bytes, one 32K byte, and seven 64K bytes.
Any combination of sectors can be concurrently erased. Also supports full chip erase.
T = Top sector
B = Bottom sector
Automatically pre-programs and erases the chip or any sector
Automatically writes and verifies data at specified address
Hardware method for detection of program or erase cycle completion
Suspends the erase operation to allow a read in another sector within the same device
Resets internal state machine to the read mode
Hardware method disables any combination of sectors from write or erase operations
Temporary sector unprotection via the RESET pin.
TM
and Embedded Program
TM
Algorithms
TM
Algorithms
3.2 V
TM
are trademarks of Advanced Micro Devices, Inc.
-55/-70/-90
2
PROMs
8/256K
/MBM29F400BC
16) BIT
DS05-20851-4E
-55/-70/-90

Related parts for MBM29F400TC-70PFTN

MBM29F400TC-70PFTN Summary of contents

Page 1

... FUJITSU SEMICONDUCTOR DATA SHEET FLASH MEMORY CMOS 4M (512K MBM29F400TC FEATURES • Single 5.0 V read, write, and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Uses same software commands as E • Compatible with JEDEC-standard world-wide pinouts 48-pin TSOP (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type) 44-pin SOP (Package suffix: PF) • ...

Page 2

... MBM29F400TC -55/-70/-90 PACKAGE 48-pin TSOP (I) Marking Side (FPT-48P-M19) 2 /MBM29F400BC Marking Side (FPT-48P-M20) -55/-70/-90 44-pin SOP Marking Side (FPT-44P-M16) ...

Page 3

... MBM29F400TC GENERAL DESCRIPTION The MBM29F400TC/ 4M-bit, 5.0 V-only Flash memory organized as 512K bytes of 8 bits each or 256K words of 16 bits each. The MBM29F400TC/BC is offered in a 48-pin TSOP and 44-pin SOP packages. This device is designed to be programmed in-system with the standard system 5 required for write or erase operations ...

Page 4

... Individual or multiple-sector protection is user definable. 16K byte 8K byte 8K byte 32K byte 64K byte 64K byte 64K byte 64K byte 64K byte 64K byte 64K byte MBM29F400TC Sector Architecture 4 /MBM29F400BC ( 8) ( 16) 7FFFFH 3FFFFH 64K byte 7BFFFH 3DFFFH 64K byte 79FFFH 3CFFFH ...

Page 5

... Buffer State Control BYTE RESET Command Register CE OE Low V Detector /MBM29F400BC -55/-70/-90 MBM29F400TC/MBM29F400BC -55 — — - RY/BY Erase Voltage Generator Program Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer for Address Program/Erase Latch ...

Page 6

... FPT-48P-M19 A 24 (Marking Side N.C. 16 RY/BY 15 N.C. 14 N.C. 13 MBM29F400TC/MBM29F400BC RESET 12 Reverse Pinout WE 11 N. FPT-48P-M20 6 /MBM29F400BC TSOP ( ...

Page 7

... MBM29F400TC LOGIC SYMBOL RY/BY RESET BYTE /MBM29F400BC -55/-70/-90 Table 1 MBM29F400TC/BC Pin Configuration Pin Function Address Inputs Data Inputs/Outputs Chip Enable Output Enable OE Write Enable WE Ready-Busy Output RY/BY Hardware Reset Pin/ ...

Page 8

... Read (3) Standby Output Disable Write Enable Sector Protection (2) Verify Sector Protection (2) Temporary Sector Unprotection Reset (Hardware)/Standby Table 3 MBM29F400TC/BC User Bus Operation (BYTE = V Operation Auto-Select Manufacturer Code (1) Auto-Select Device Code (1) Read (3) Standby Output Disable Write Enable Sector Protection (2) Verify Sector Protection (2) ...

Page 9

... MBM29F400TC ORDERING INFORMATION Standard Products Fujitsu standard products are available in several packages. The order number is formed by a combination of: MBM29F400 T C -55 DEVICE NUMBER/DESCRIPTION MBM29F400 4Mega-bit (512K 5.0 V-only Read, Write, and Erase /MBM29F400BC -55/-70/-90 PFTN PACKAGE TYPE PFTN = 48-Pin Thin Small Outline Package (TSOP (I)) Standard Pinout ...

Page 10

... FUNCTIONAL DESCRIPTION Read Mode The MBM29F400TC/BC has two control functions which must be satisfied in order to obtain data at the outputs the power control and should be used for a device selection the output control and should be used to gate data to the output pins if a device is selected. ...

Page 11

... Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters. Sector Protection The MBM29F400TC/BC features hardware sector protection. This feature will disable both program and erase operations in any number of sectors (0 through 10). The sector protection feature is enabled using programming equipment at the user’s site. The device is shipped with all sectors unprotected. ...

Page 12

... Autoselect codes. Temporary Sector Unprotection This feature allows temporary unprotection of previously protected sectors of the MBM29F400TC/BC device in order to change data. The Sector Unprotection mode is activated by setting the RESET pin to high voltage (12 V). During this mode, formerly protected sectors can be programmed or erased by selecting the sector addresses ...

Page 13

... SA1 0 0 SA2 0 0 SA3 0 0 SA4 0 0 SA5 0 1 SA6 0 1 SA7 1 0 SA8 1 0 SA9 1 1 SA10 1 1 /MBM29F400BC -55/-70/-90 Sector Address Tables (MBM29F400TC ...

Page 14

... The read or eset operation is initiated by writing the read/reset command sequence into the command register. Microprocessor read cycles retrieve array data from the memory. The devices remain enabled for reads until the command register contents are altered. 14 /MBM29F400BC -55/-70/-90 MBM29F400TC/BC Command Definitions Second Third Bus Bus Write Cycle Write Cycle — ...

Page 15

... The operation is initiated by writing the autoselect command sequence into the command register. Following the command write, a read cycle from address XX00H retrieves the manufacture code of 04H. A read cycle from address XX01H for 16 (XX02H for 8) returns the device code (MBM29F400TC = 23H and MBM29F400BC = ABH for 8 mode; MBM29F400TC = 2223H and MBM29F400BC = 22ABH for 16 mode). ...

Page 16

... MBM29F400TC Chip erase does not require the user to program the device prior to erase. Upon executing the Embedded Erase Algorithm command sequence the device will automatically program and verify the entire memory for an all zero data pattern prior to electrical erase. The system is not required to provide any controls or timings during these operations ...

Page 17

... MBM29F400TC When the Erase Suspend command is written during the Sector Erase operation, the device will take a maximum suspend the erase operation. When the device has entered the erase-suspended mode, the RY/BY output pin and the DQ bit will be at logic “1”, and DQ ...

Page 18

... DQ 6 Toggle Bit I The MBM29F400TC/BC also feature the “Toggle Bit I” method to indicate to the host system that the Embedded Algorithms are in progress or completed. During an Embedded Program or Erase Algorithm cycle, successive attempts to read (OE toggling) data from the device will result in DQ toggling between one and zero ...

Page 19

... MBM29F400TC condition. The CE circuit will partially power down the device under these conditions (to approximately 2 mA). The OE and WE pins will control the output disable functions as described in Tables 2 and 3. The DQ failure condition may also appear if a user tries to program a non blank location without erasing. In this 5 case the device locks out and never complete the Embedded Algorithm operation ...

Page 20

... When the RY/BY pin is low, the device will not accept any additional program or erase commands. If the MBM29F400TC/BC is placed in an Erase Suspend mode, the RY/BY output will be high. Also, since this is an open drain output, many RY/BY pins can be tied together in parallel with a pull up resistor to V During programming, the RY/BY pin is driven low after the rising edge of the fourth write pulse ...

Page 21

... MBM29F400TC Low V Write Inhibit CC To avoid initiation of a write cycle during V than 3.2 V (typically 3.7 V < are disabled. Under this condition the device will reset to the read mode. Subsequent writes will be ignored until the V level is greater than the users responsibility to ensure that the control pins are logically correct ...

Page 22

... Supply Voltages CC MBM29F400TC/BC-55..............................................................................+4. +5.25 V MBM29F400TC/BC-70/-90 .......................................................................+4. +5.50 V Operating ranges define those limits between which the functionality of the devices are guaranteed. WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges ...

Page 23

... MBM29F400TC MAXIMUM OVERSHOOT +0.8 V –0.5 V –2.0 V Figure +2.0 V Figure 2 +14.0 V +13 +0 Note: This waveform is applied for A Figure 3 /MBM29F400BC -55/-70/- Maximum Negative Overshoot Waveform Maximum Positive Overshoot Waveform OE, and RESET. 9 Maximum Positive Overshoot Waveform ...

Page 24

... MBM29F400TC DC CHARACTERISTICS Parameter Parameter Description Symbol I Input Leakage Current LI I Output Leakage Current OE, RESET Inputs Leakage 9 I LIT Current I V Active Current (Note 1) CC1 Active Current (Note 2) CC2 Current (Standby) CC3 Current (Standby, Reset) CC4 CC V Input Low Level ...

Page 25

... MBM29F400TC AC CHARACTERISTICS • Read Only Operations Characteristics Parameter Symbols Description JEDEC Standard t t Read Cycle Time AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to Output Delay GLQV Chip Enable to Output High-Z EHQZ ...

Page 26

... Read Min. Toggle and Data Polling Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Typ. Typ. Max. Min. Min. ID Min. Min. Min. Min. Min. -55/-70/-90 MBM29F400TC/BC Unit -55 -70 - ...

Page 27

... Delay Time from Embedded Output — t EOE Enable Notes: 1. This does not include the preprogramming time. 2. These timing is for Sector Protection operation. /MBM29F400BC -55/-70/-90 Description -55 Min. 500 Min. 50 Max. 30 Min. 30 Max. 55 Max. 30 -55/-70/-90 MBM29F400TC/BC Unit -70 -90 500 500 ...

Page 28

... MBM29F400TC SWITCHING WAVEFORMS • Key to Switching Waveforms Addresses High-Z Outputs Figure 5 28 /MBM29F400BC -55/-70/-90 WAVEFORM INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Be Change Changing from from May Will Be Change Changing from from “H” or “L” ...

Page 29

... MBM29F400TC 3rd Bus Cycle Addresses 555H GHWL WPH A0H PD Data t DS 5.0 V Notes address of the memory location to be programmed data to be programmed at byte address the output of the complement of the data written to the device. ...

Page 30

... MBM29F400TC 3rd Bus Cycle Addresses 555H Data t DS 5.0 V Notes address of the memory location to be programmed data to be programmed at byte address the output of the complement of the data written to the device the output of the data written to the device. ...

Page 31

... MBM29F400TC Addresses 555H GHWL WPH t DH AAH Data VCS Notes the sector address for Sector Erase. Addresses = 555H (Word), AAAH (Byte) for Chip Erase. 2. These waveforms are for the Figure 8 AC Waveforms Chip/Sector Erase Operations ...

Page 32

... MBM29F400TC Data 7 Data *DQ = Valid Data (The device has completed the Embedded operation). 7 Figure 9 AC Waveforms for Data Polling during Embedded Algorithm Operations CE t OEH WE t OES OE Data *DQ stops toggling (The device has completed the Embedded operation). ...

Page 33

... MBM29F400TC -55/-70/- RY/BY Figure 11 RY/BY Timing Diagram during Program/Erase Operations WE RESET t RY/BY Figure 12 RESET/RY/BY Timing Diagram /MBM29F400BC The rising edge of the last WE signal Entire programming or erase operations t BUSY READY -55/-70/-90 33 ...

Page 34

... MBM29F400TC CE BYTE ELFH Figure 13 CE BYTE t ELFL Figure BYTE Figure 15 34 /MBM29F400BC -55/-70/-90 Data Output Data Output ( ( FHQV A -1 Timing Diagram for Word Mode Configuration Data Output Data Output ...

Page 35

... MBM29F400TC SAX VLHT VLHT WE t CSP CE Data t VLHT V CC SAX = Sector Address for initial sector SAY = Sector Address for next sector Note byte mode. ...

Page 36

... MBM29F400TC VIDR t VCS RESET CE WE RY/BY Figure 17 Enter Erase Embedded Suspend Erasing WE Erase Erase Suspend Toggle DQ and with OE Note read from the erase-suspended sector /MBM29F400BC -55/-70/-90 t Program or Erase Command Sequence VLHT Unprotection period Temporary Sector Unprotection Timing Diagram ...

Page 37

... MBM29F400TC EMBEDDED ALGORITHMS Increment Address * : The sequence is applied for The addresses differ from 8 mode. Figure 19 /MBM29F400BC -55/-70/-90 Start Write Program Command Sequence (See Below) Data Polling Device No Last Address ? Yes Programming Completed Program Command Sequence* (Address/Command): 555H/AAH 2AAH/55H 555H/A0H Program Address/Program Data 16 mode ...

Page 38

... MBM29F400TC EMBEDDED ALGORITHMS Chip Erase Command Sequence* (Address/Command): 555H/AAH 2AAH/55H 555H/80H 555H/AAH 2AAH/55H 555H/10H * : The sequence is applied for The addresses differ from 38 /MBM29F400BC -55/-70/-90 Start Write Erase Command Sequece (See Below) Data Polling or Toggle Bit Successfully Completed Erasure Completed Individual Sector/Multiple Sector* ...

Page 39

... MBM29F400TC No Note rechecked even Figure 21 /MBM29F400BC -55/-70/- Byte address for programming = Any of the sector addresses Start within the sector being erased during sector erase operation = Any of the sector addresses Read Byte within the sector not being ( protected during chip erase Addr ...

Page 40

... MBM29F400TC Note rechecked even changing to “1” /MBM29F400BC -55/-70/-90 Start Read Byte ( Addr. = “H” or “L” Toggle 6 ? Yes Yes Read Byte ( Addr. = “H” or “L” Toggle 6 ? Yes Fail Pass = “ ...

Page 41

... MBM29F400TC Increment PLSCNT No PLSCNT = 25? Yes Remove V from A ID Write Reset Command Device Failed * : byte mode Figure 23 /MBM29F400BC -55/-70/-90 Start Setup Sector Addr 16 PLSCNT = RESET = Activate WE Pulse ...

Page 42

... MBM29F400TC Notes: 1. All protected sectors unprotected. 2. All previously protected sectors are protected once again. Figure 24 42 /MBM29F400BC -55/-70/-90 Start RESET = V ID (Note 1) Perform Erase or Program Operations RESET = V IH Temporary Sector Unprotection Completed (Note 2) Temporary Sector Unprotection Algorithm -55/-70/-90 ...

Page 43

... MBM29F400TC ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Word Programming Time Byte Programming Time Chip Programming Time Erase/Program Cycle TSOP (I) PIN CAPACITANCE Parameter Parameter Description Symbol C Input Capacitance IN C Output Capacitance OUT C Control Pin Capacitance IN2 Note: Test conditions T = 25° 1.0 MHz ...

Page 44

... MBM29F400TC PACKAGE DIMENSIONS 48-pin plastic TSOP (I) (FPT-48P-M19) LEAD No. 1 INDEX 24 20.00±0.20 (.787±.008) * 18.40±0.20 (.724±.008) 0.10(.004) 19.00±0.20 (.748±.008) 1996 FUJITSU LIMITED F48029S-2C /MBM29F400BC -55/-70/-90 *: Resin protrusion. (Each side: 0.15(.006) Max) 48 Details of "A" part "A" ...

Page 45

... MBM29F400TC 48-pin plastic TSOP (I) (FPT-48P-M20) LEAD No. 1 INDEX 24 19.00±0.20 (.748±.008) 0.10(.004) * 18.40±0.20 (.724±.008) 20.00±0.20 (.787±.008) 1996 FUJITSU LIMITED F48030S-2C-2 C /MBM29F400BC -55/-70/-90 *: Resin protrusion. (Each side: 0.15(.006) Max) 48 Details of "A" part "A" 0.15(.006) 0.25(.010) 25 0.50±0.10 (.020± ...

Page 46

... MBM29F400TC (Continued) 44-pin plastic SOP (FPT-44P-M16) 28.45 44 INDEX LEAD No. 1 1.27(.050)TYP 0.10(.004) 26.67(1.050)REF 1995 FUJITSU LIMITED F44023S-3C /MBM29F400BC -55/-70/-90 +0.25 +.010 1.120 −0.20 −.008 23 13.00±0.10 (.512±.004) "A" 22 +0.10 0.40 0.05(.002)MIN −0.05 Ø0.13(.005) M +.004 (Stand off) .016 −.002 -55/-70/-90 2.50(.098)MAX (Mounting height) 0.80± ...

Page 47

... MBM29F400TC FUJITSU LIMITED For further information please contact: Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-8588, Japan Tel: 81(44) 754-3763 Fax: 81(44) 754-3329 http://www.fujitsu.co.jp/ North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division ...

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