MBM29LV400BC-90PFTN Fujitsu, MBM29LV400BC-90PFTN Datasheet
MBM29LV400BC-90PFTN
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MBM29LV400BC-90PFTN Summary of contents
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... When addresses remain stable, automatically switch themselves to low power mode • Low V write inhibit 2 • Erase Suspend/Resume Suspends the erase operation to allow a read in another sector within the same device Embedded Erase TM and Embedded Program 8/256K /MBM29LV400BC -70/-90/-12 2 PROMs TM are trademarks of Advanced Micro Devices, Inc. DS05-20862-3E 16) BIT -70/-90/-12 (Continued) ...
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... Sector Protection set function by Extended sector Protect command • Temporary sector unprotection Temporary sector unprotection via the RESET pin PACKAGES 48-pin plastic TSOP (I) Marking Side (FPT-48P-M19) 44-pin plastic SOP Marking Side (FPT-44P-M16) 48-pin plastic FBGA (BGA-48P-M01) 2 /MBM29LV400BC -70/-90/-12 48-pin plastic TSOP (I) Marking Side 48-pin plastic CSOP -70/-90/-12 (FPT-48P-M20) (LCC-48P-M03) ...
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... The MBM29LV400TC/BC memories electrically erase the entire chip or all bits within a sector simultaneously via Fowler-Nordhiem tunneling. The bytes/words are programmed one byte/word at a time using the EPROM programming mechanism of hot electron injection. /MBM29LV400BC -70/-90/-12 are not required for write or erase operations. The devices can also ...
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... MBM29LV400BC Sector Architecture -70/-90/- 16) 7FFFFH 3FFFFH 6FFFFH 37FFFH 5FFFFH 2FFFFH 4FFFFH 27FFFH 3FFFFH 1FFFFH 2FFFFH 17FFFH 1FFFFH 0FFFFH ...
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... State BYTE Control RESET Command Register CE OE Low V Detector /MBM29LV400BC -70/-90/-12 MBM29LV400TC/MBM29LV400BC +0.3 V -70 –0.3 V +0.6 V — –0 RY/BY Erase Voltage Generator Program Voltage Chip Enable Generator Output Enable Logic Y-Decoder STB Timer for Address Program/Erase ...
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... N.C. 14 N.C. MBM29LV400TC/MBM29LV400BC 13 RESET 12 Reverse Pinout WE 11 N. FPT-48P-M20 6 /MBM29LV400BC -70/-90/-12 TSOP( BYTE ...
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... /MBM29LV400BC -70/-90/-12 (TOP VIEW ...
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... MBM29LV400TC LOGIC SYMBOL RESET RY/BY BYTE 8 /MBM29LV400BC -70/-90/-12 Table 1 MBM29LV400TC/400BC Pin Configuration Pin Address Inputs - Data Inputs/Outputs Chip Enable OE Output Enable Write Enable RY/BY Ready/Busy Output Hardware Reset Pin/Temporary Sector ...
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... Notes: 1. Manufacturer and device codes may also be accessed via a command register write sequence. See Table 7. 2. Refer to the section on Sector Protection can 3.3 V ± 10 also used for the extended sector protection. /MBM29LV400BC -70/-90/- ...
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... MBM29LV400 T C -70 DEVICE NUMBER/DESCRIPTION MBM29LV400 4Mega-bit (512K 3.0 V-only Read, Program, and Erase 10 /MBM29LV400BC -70/-90/-12 PFTN PACKAGE TYPE PFTN = 48-Pin Thin Small Outline Package PFTR = 48-Pin Thin Small Outline Package PF = PCV = 48-Pin C- leaded Small Outline PBT = 48-Ball Fine Pitch Ball Grid Array SPEED OPTION ...
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... To activate this mode, the programming equipment must force V identifier bytes may then be sequenced from the devices outputs by toggling address A addresses are DON’T CARES except A /MBM29LV400BC -70/-90/-12 -t time.) When reading out a data without changing addresses after ACC OE ), output from the devices are disabled ...
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... IL code (MBM29LV400TC = B9H and MBM29LV400BC = BAH for 8 mode; MBM29LV400TC = 22B9H and MBM29LV400BC = 22BAH for 16 mode). These two bytes/words are given in the tables 4.1 and 4.2. All identifiers for manufactures and device will exhibit odd parity with DQ device codes when executing the autoselect, A Table 4 ...
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... The Sector Unprotection mode is activated by setting the RESET pin to high voltage (12 V). During this mode, formerly protected sectors can be programmed or erased by selecting the sector addresses. Once the taken away from the RESET pin, all the previously protected sectors will be protected again. See Figures 17 and 25. /MBM29LV400BC -70/-90/-12 , while and ...
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... Refer to Temporary Sector Unprotection for additional functionality. If hardware reset occurs during Embedded Erase Algorithm, there is a possibility that the erasing sector(s) cannot be used. 14 /MBM29LV400BC -70/-90/-12 ) for at least 500 ns in order to properly reset the internal state machine. IL before it will allow read access. When the RESET pin is low, the devices will ...
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... X SA6 SA7 SA8 SA9 SA10 /MBM29LV400BC -70/-90/- Address Range ( 00000H to 0FFFFH X X 10000H to 1FFFFH X X 20000H to 2FFFFH X X 30000H to 3FFFFH X X 40000H to 4FFFFH X X 50000H to 5FFFFH X X 60000H to 6FFFFH ...
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... SA3 0 0 SA4 0 0 SA5 0 1 SA6 0 1 SA7 1 0 SA8 1 0 SA9 1 1 SA10 /MBM29LV400BC -70/-90/-12 Sector Address Tables (MBM29LV400BC Address Range ( 00000H to 03FFFH 04000H to 05FFFH 06000H to 07FFFH 08000H to 0FFFFH ...
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... PD = Data to be programmed at location PA. Data is latched on the falling edge of WE. 5. The system should generate the following address patterns: Word Mode: 555H or 2AAH to addresses A Byte Mode: AAAH or 555H to addresses A 6. Both Read/Reset commands are functionally equivalent, resetting the device to the read mode. /MBM29LV400BC -70/-90/-12 Fourth Bus Second Bus Third Bus ...
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... Standard microprocessor read cycles will retrieve array data. This default value ensures that no spurious alteration of the memory content occurs during the power transition. Refer to the AC Read Characteristics and Waveforms for the specific timing parameters. 18 /MBM29LV400BC -70/-90/-12 MBM29LV400TC/BC Extended Command Definitions First Bus ...
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... Following the command write, a read cycle from address XX00H retrieves the manufacture code of 04H. A read cycle from address XX01H for 16(XX02H for 8) returns the device code (MBM29LV400TC = B9H and MBM29LV400BC = BAH for 8 mode; MBM29LV400TC = 22B9H and MBM29LV400BC = 22BAH for 16 mode). (See Tables 4.1 and 4.2.) All manufacturer and device codes will exhibit odd parity with DQ bit ...
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... Multiple Sector Erase Time; [Sector Erase Time + Sector Program Time (Preprogramming)] Number of Sector Erase Figure 21 illustrates the Embedded Erase 20 /MBM29LV400BC -70/-90/-12 All sectors + Chip Program Time (Preprogramming) TM Algorithm using typical command strings and bus operations. , Sector Erase Timer.) Any command other than Sector 3 is “ ...
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... To resume the operation of Sector Erase, the Resume command (30H) should be written. Any further writes of the Resume command at this point will be ignored. Another Erase Suspend command can be written after the chip has resumed erasing. /MBM29LV400BC -70/-90/-12 will stop toggling. The user must use the address of ...
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... If the output data is logical “0”, please repeat to write extended sector protect command (60H) again. To terminate the operation necessary to set RESET pin /MBM29LV400BC -70/-90/-12 active current is required even RESET pin and write a commnad sequence. ID and control timing for control pins ...
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... Reading the byte address being programmed while in the erase-suspend program mode will indicate logic “1” at the DQ bit. However, successive reads from the erase-suspended sector will cause DQ 2 toggle and DQ are reserve pins for future use Fujitsu internal use only. 4 /MBM29LV400BC -70/-90/-12 Table 9 Hardware Sequence Flags -70/-90/- ...
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... Either toggling will cause the DQ cause the DQ to toggle. 6 See Figure 10 for the Toggle Bit I timing specifications and diagrams. 24 /MBM29LV400BC -70/-90/-12 . Upon completion of the Embedded Program 7 ) may change asynchronously while the output ...
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... Furthermore, DQ can also be used to determine which sector is being erased. When the device is in the erase 2 mode, DQ toggles if this bit is read from an erasing sector. 2 /MBM29LV400BC -70/-90/-12 never stops toggling. Once the devices have exceeded timing limits, the toggle during the Embedded Erase Algorithm. If the ...
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... Read mode. Also, with its control register architecture, alteration of the memory contents only occurs after successful completion of specific multi-bus cycle command sequences. The devices also incorporate several features to prevent inadvertent write cycles resulting form V and power-down transitions or system noise. 26 /MBM29LV400BC -70/-90/- ...
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... logical one. Power-Up Write Inhibit Power-up of the devices with The internal state machine is automatically reset to the read mode on power-up. /MBM29LV400BC -70/-90/-12 power-up and power-down, a write cycle is locked out for the command register is disabled and all internal program/erase circuits LKO is above 2 ...
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... No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. 28 /MBM29LV400BC -70/-90/-12 , OE, RESET (Note 1) ................... –0 and RESET pins are –0.5 V. During voltage transitions, A9 – ...
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... V –2.0 V Figure +2.0 V Figure 2 Maximum Positive Overshoot Waveform 1 +14.0 V +13 +0 This waveform is applied for A Figure 3 Maximum Positive Overshoot Waveform 2 /MBM29LV400BC -70/-90/- Maximum Negative Overshoot Waveform OE, and RESET. 9 -70/-90/-12 29 ...
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... MHz active while Embedded Algorithm (program or erase progress Automatic sleep mode enables the low power mode when address remain stable for 150 ns – not exceed /MBM29LV400BC -70/-90/-12 Test Conditions ...
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... TTL gate and 100 pF (MBM29LV400TC/BC-90/-12) Input rise and fall times Input pulse levels: 0 3.0 V Timing measurement reference level Input: 1.5 V Output:1.5 V Notes including jig capacitance (MBM29LV400TC/BC-70 100 pF including jig capacitance (MBM29LV400TC/BC-90/-12) L /MBM29LV400BC -70/-90/-12 Test Setup — Min Max Max. ...
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... CE Setup Time to WE Active (Note 2) CSP — t Recover Time From RY/BY RB — t RESET Pulse Width RP — t RESET Hold Time Before Read RH 32 /MBM29LV400BC -70/-90/-12 Description Min. Min. Min. Min. Min. Min. Read Min. Toggle and Data Polling Min. Min. Min. Min. Min. ...
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... BYTE Switching High to Output Active FHQV — t Program/Erase Valid to RY/BY Delay BUSY — t Delay Time from Embedded Output Enable EOE Notes: 1. This does not include the preprogramming time. 2. This timing is for Sector Protection operation. /MBM29LV400BC -70/-90/-12 Description Max. Min. Max. Max. -70/-90/-12 MBM29LV400TC/BC Unit -70 -90 ...
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... MBM29LV400TC SWITCHING WAVEFORMS • Key to Switching Waveforms Addresses Outputs Figure 5.1 34 /MBM29LV400BC -70/-90/-12 WAVEFORM INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Be Change Changing from from May Will Be Change Changing from from “H” or “L” Changing Any Change ...
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... MBM29LV400TC Addresses t RH RESET High-Z Outputs Figure 5.2 AC Waveforms for Hardware Reset/Read Operations /MBM29LV400BC -70/-90/- Addresses Stable t ACC Output Valid -70/-90/- ...
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... OUT 5. Figure indicates last two bus cycles out of four bus cycle sequence. 6. These waveforms are for the 16 mode. (The addresses differ from 8 mode.) Figure 6 AC Waveforms for Alternate WE Controlled Program Operations 36 /MBM29LV400BC -70/-90/-12 Data Polling ...
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... OUT 5. Figure indicates last two bus cycles out of four bus cycle sequence. 6. These waveforms are for the 16 mode. (The addresses differ from 8 mode.) Figure 7 AC Waveforms for Alternate CE Controlled Program Operations /MBM29LV400BC -70/-90/-12 Data Polling ...
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... GHWL WE Data t VCS V CC Notes the sector address for Sector Erase. Addresses = 555H (Word), AAAH (Byte) for Chip Erase. 2. These waveforms are for the 16 mode. (The addresses differ from 8 mode.) Figure 8 38 /MBM29LV400BC -70/-90/-12 2AAH 555H 555H ...
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... AC Waveforms for Data Polling during Embedded Algorithm Operations CE t OEH WE t OES OE DQ Data DQ = Toggle stops toggling (The device has completed the Embedded operation). 6 Figure 10 AC Waveforms for Toggle Bit I during Embedded Algorithm Operations /MBM29LV400BC -70/-90/- Valid Data t WHWH1 ...
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... MBM29LV400TC CE WE RY/BY Figure 11 RY/BY Timing Diagram during Program/Erase Operations WE RESET RY/BY 40 /MBM29LV400BC -70/-90/-12 The rising edge of the last WE signal READY Figure 12 RESET/RY/BY Timing Diagram -70/-90/-12 Entire programming or erase operations BUSY t RB ...
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... Figure 13 Timing Diagram for Word Mode Configuration CE BYTE t ELFL Figure 14 Timing Diagram for Byte Mode Configuration BYTE Figure 15 /MBM29LV400BC -70/-90/-12 Data Output Data Output ( ( FHQV Data Output Data Output (DQ ...
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... Data t VCS V CC SAX : Sector Address for initial sector SAY : Sector Address for next sector Note byte mode Figure 16 42 /MBM29LV400BC -70/-90/-12 SAX VLHT t VLHT t WPP t OESP t CSP AC Waveforms for Sector Protection Timing Diagram -70/-90/-12 t VLHT VLHT 01H ...
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... Erase Erase Suspend Read Toggle DQ and with OE Note read from the erase-suspended sector. 2 /MBM29LV400BC -70/-90/-12 t Program or Erase Command Sequence VLHT Unprotection Period protection Timing Diagram Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program Figure 18 DQ vs. DQ ...
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... VIDR Add Data SPAX : Sector Address to be protected SPAY : Next Sector Address to be protected TIME-OUT : Time-Out window = 150 s (min) Figure 19 44 /MBM29LV400BC -70/-90/-12 SPAX TIME-OUT 60H 60H Extended Sector Protection Timing Diagram -70/-90/-12 SPAX SPAY 60H 40H 01H t OE ...
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... MBM29LV400TC EMBEDDED ALGORITHMS Increment Address * : The sequence is applied for The addresses differ from 8 mode. Figure 20 /MBM29LV400BC -70/-90/-12 Start Write Program Command Sequence (See below) Data Polling Device No Last Address ? Yes Programming Completed Program Command Sequence* (Address/Command): 555H/AAH 2AAH/55H 555H/A0H Program Address/Program Data 16 mode ...
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... EMBEDDED ALGORITHMS Chip Erase Command Sequence* (Address/Command): 555H/AAH 2AAH/55H 555H/AAH 2AAH/55H * : The sequence is applied for The addresses differ from 46 /MBM29LV400BC -70/-90/-12 Start Write Erase Command Sequence (See below) Data Polling or Toggle Bit Successfully Completed Erasure Completed Individual Sector/Multiple Sector* Erase Command Sequence ...
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... Addr Data Fail Note rechecked even Figure 22 /MBM29LV400BC -70/-90/- Byte address for programming ) 7 = Any of the sector addresses within the sector being erased during sector erase or multiple sector Yes erases operation = Any of the sector addresses within the sector not being protected ...
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... MBM29LV400TC Note rechecked even changing to “1” /MBM29LV400BC -70/-90/-12 Start Read ( Addr. = "H" or "L" Toggle 6 ? Yes Yes Read ( Addr Toggle 6 ? Yes Fail Pass = “1” because DQ may stop toggling at the same time as ...
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... MBM29LV400TC Increment PLSCNT No PLSCNT = 25? Yes Remove V from A ID Write Reset Command Device Failed * : byte mode Figure 24 /MBM29LV400BC -70/-90/-12 Start Setup Sector Addr PLSCNT = RESET = ...
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... MBM29LV400TC Notes: 1. All protected sectors are unprotected. 2. All previously protected sectors are protected once again. Figure 25 50 /MBM29LV400BC -70/-90/-12 Start RESET = V ID (Note 1) Perform Erase or Program Operations RESET = V IH Temporary Sector Unprotection Completed (Note 2) Temporary Sector Unprotection Algorithm -70/-90/-12 ...
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... FAST MODE ALGORITHM Device is Operating in Temporary Sector Unprotection Mode Increment PLSCNT No PLSCNT = 25? Yes Remove V from RESET ID Write Reset Command Device Failed Figure 26 /MBM29LV400BC -70/-90/-12 Start RESET = V ID Wait Extended Sector Protection Entry? Yes To Setup Sector Protection Write XXXH/60H PLSCNT = 1 To Sector Protection ...
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... MBM29LV400TC FAST MODE ALGORITHM Increment Address * : The sequence is applied for The addresses differ from Figure 27 52 /MBM29LV400BC -70/-90/-12 Start 555H/AAH 2AAH/55H 555H/20H XXXH/A0H Program Address/Program Data Data Polling Device No Verify Byte? Yes No Last Address ? Yes Programming Completed XXXH/90H XXXH/F0H 16 mode. 8 mode. Embedded Program ...
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... Note: Test conditions T = 25° 1.0 MHz A FBGA PIN CAPACITANCE Parameter Parameter Description Symbol C Input Capacitance IN C Output Capacitance OUT C Control Pin Capacitance IN2 Note: Test conditions T = 25° 1.0 MHz A /MBM29LV400BC -70/-90/-12 Limits Unit Typ. Max. — sec — 16 360 — 8 300 — 4.2 12.5 sec — ...
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... LEAD No. 1 INDEX 24 19.00±0.20 (.748±.008) 0.10(.004) * 18.40±0.20 (.724±.008) 20.00±0.20 (.787±.008) 1996 FUJITSU LIMITED F48030S-2C /MBM29LV400BC -70/-90/-12 48 Details of "A" part "A" 0.15(.006 12.00±0.20 0.50(.0197) TYP 0.15±0.05 (.006±.002) 0.50±0.10 (.020±.004) 48 Details of "A" part " ...
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... INDEX LEAD No. 1 1.27(.050)TYP +0.10 0.10(.004) 0.40 –0.05 +.004 .016 –.002 26.67(1.050)REF 1998 FUJITSU LIMITED F44023S-4C-4 C /MBM29LV400BC -70/-90/-12 23 13.00±0.10 16.00±0.20 (.512±.004) (.630±.008) 22 +0.10 +.004 0.20 .008 –0.15 –.006 Ø0.13(.005) M (Stand off) -70/-90/-12 2.35±0.15(.093±.006) (Mounting height) (Mounting height) 0.80± ...
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... MBM29LV400TC 48-pin plastic FBGA (BGA-48P-M01) 8.00 0.20(.315 .008) INDEX 0.10(.004) 1997 FUJITSU LIMITED B48001S-1C /MBM29LV400BC -70/-90/-12 1.20(.047)MAX (Mounting height) 0.35 0.10(.014 .004) (Stand off) 0.80(.031) NOM 6.00 0.20 4.00(.157) (.236 .008) -70/-90/-12 5.60(.221) 0.80(.031)NOM Ø0.40 0.10 Ø0.08(.003) M (.016 .004) ...
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... MBM29LV400TC 48-pin plastic CSOP (LCC-48P-M03) 48 INDEX LEAD No. 1 10.00±0.10(.394±.004) 0.40(.016) 0.08(.003) TYP 9.20(.362)REF 1998 FUJITSU LIMITED C48056S-1C-1 C /MBM29LV400BC -70/-90/-12 "A" 25 10.00±0.20 (.394±.008) 9.50±0.10 (.374±.004) +0.05 0.05 –0 +.002 .002 –.0 (Stand off) 24 0.95±0.05(.037±.002) (Mounting height) Details of " ...
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... Tel: (65) 281-0770 Fax: (65) 281-0220 http://www.fmap.com.sg/ F9904 FUJITSU LIMITED Printed in Japan 58 /MBM29LV400BC -70/-90/-12 All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use ...