MAX3748HETE#G16 Maxim Integrated Products, MAX3748HETE#G16 Datasheet - Page 8
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MAX3748HETE#G16
Manufacturer Part Number
MAX3748HETE#G16
Description
IC AMP LIMITING 16-TQFN-EP
Manufacturer
Maxim Integrated Products
Type
Limiting Amplifierr
Datasheet
1.MAX3748HETETG16.pdf
(12 pages)
Specifications of MAX3748HETE#G16
Applications
Optical Networks
Mounting Type
Surface Mount
Package / Case
16-TQFN Exposed Pad
Amplifier Type
Limiting
Supply Voltage Range
2.97V To 3.63V
Amplifier Case Style
TQFN
No. Of Pins
16
Operating Temperature Range
-40°C To +85°C
Filter Terminals
SMD
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
The MAX3748/MAX3748A limiting amplifier’s CML out-
put provides high tolerance to impedance mismatches
and inductive connectors. The output current is approx-
imately 18mA. The output is disabled by connecting the
DISABLE pin to V
DISABLE pin, the outputs OUT+ and OUT- are at a stat-
ic voltage (squelch) whenever the input signal level
drops below the LOS threshold. The output buffer can
be AC- or DC-coupled to the load (Figure 4).
The MAX3748/MAX3748A are equipped with an LOS
circuitry, which indicates when the input signal is below
a programmable threshold, set by resistor R
pin (see Typical Operating Characteristics for appropri-
ate resistor sizing). An averaging peak-power detector
compares the input signal amplitude with this threshold
and feeds the signal detect information to the LOS out-
put, which is open collector. Two control voltages,
V
deassert levels. To prevent LOS chatter in the region of
the programmed threshold, approximately 2dB of hys-
teresis is built into the LOS assert/deassert function.
Once asserted, LOS is not deasserted until the input
amplitude rises to the required level (V
(Figure 5).
Compact 155Mbps to 4.25Gbps
Limiting Amplifier
Figure 4. CML Output Buffer
8
ASSERT
DISABLE
DATA
_______________________________________________________________________________________
DISABLE
Q3
and V
Q4
18mA
DEASSERT
CC
. If the LOS pin is connected to the
DISABLE
50Ω
Loss-of-Signal Indicator
, define the LOS assert and
Q1
V
CC
CML Output Buffer
Q2
Power-Detect and
18mA
50Ω
TH
DEASSERT
at the TH
STRUCTURES
OUT+
OUT-
ESD
)
The MAX3748HETE is the MAX3748A in a hybrid lead-
free package. The hybrid part contains leaded bumps
in a lead-free thin QFN package. The part is not 100%
lead-free; however, the high-lead solder in the internal
portion of the part does meet the RoHS exemption for
high-lead solders. For more information, visit
www.maxim-ic.com/emmi/.
External resistor R
the Assert/Deassert Levels vs. R
Operating Characteristics to select the appropriate
resistor.
When AC-coupling is desired, coupling capacitors C
and C
er’s deterministic jitter. Jitter is decreased as the input
low-frequency cutoff (f
For ATM/SONET or other applications using scrambled
NRZ data, select (C
f
other applications using 8B/10B data coding, select
(C
Refer to Application Note HFAN-1.1: Choosing AC-
Coupling Capacitors .
Figure 5. MAX3748 LOS Output Circuit
IN
IN
< 32kHz. For Fibre Channel, Gigabit Ethernet, or
, C
OUT
OUT
Program the LOS Assert Threshold
should be selected to minimize the receiv-
) ≥ 0.01µF, which provides f
Select the Coupling Capacitor
f
IN
TH
= 1 / [2π(50)(C
IN
GND
V
Hybrid Lead-Free Package
programs the LOS threshold. See
IN
CC
, C
) is decreased:
OUT
Design Procedure
) ≥ 0.1µF, which provides
TH
IN
graph in the Typical
)]
IN
ESD
STRUCTURE
< 320kHz.
LOS
IN