LTC6420IUDC-20#TRPBF Linear Technology, LTC6420IUDC-20#TRPBF Datasheet - Page 7

IC DRVR DIFF AMP/ADC DUAL 20QFN

LTC6420IUDC-20#TRPBF

Manufacturer Part Number
LTC6420IUDC-20#TRPBF
Description
IC DRVR DIFF AMP/ADC DUAL 20QFN
Manufacturer
Linear Technology
Type
ADC Driverr
Datasheet

Specifications of LTC6420IUDC-20#TRPBF

Applications
Data Acquisition
Mounting Type
Surface Mount
Package / Case
20-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PIN FUNCTIONS
+INA, –INA, –INB, +INB (Pins 1, 2, 5, 6): Differential
Inputs of A and B channel respectively.
V
four pins, as well as the exposed back, must be connected
to same voltage/ground.
ENABLEA, ENABLEB (Pins 9, 18): Logic inputs. If low,
the amplifi er is enabled. If high, the amplifi er is disabled
and placed in a low power shutdown mode, making
the amplifi er outputs high impedance. These pins are
internally separate. These pins should not be left fl oating.
BLOCK DIAGRAM
(Pins 3, 4, 13, 14, 21): Negative Power Supply. All
–INA
–INB
+INA
+INB
V –
V –
1
2
3
4
5
6
100Ω
100Ω
100Ω
100Ω
R
R
R
R
V
G
G
G
G
V
20
+
7
+
A
B
V
+
+
V
+
OCMA
OCMB
19
8
1000Ω
1000Ω
1000Ω
+
R
R
R
+
+
F
F
F
ENABLEA
ENABLEB
V
(Normally tied to 3V or 3.3V). Supply pins of A and B channels
are internally separate. Bypass each pin with 1000pF and
0.1μF capacitors as close to the pins as possible.
–OUTA, +OUTA, –OUTB, +OUTB (Pins 16, 17, 11, 10):
Differential Outputs of channels A and B respectively.
V
common mode voltage for the respective channel. They
are internally separate. A 0.1μF external bypass capacitor
is recommended.
Exposed Pad (Pin 21): V
connected to same voltage/ground as pins 3, 4, 13, 14.
18
9
+
OCMA
A , V
12.5Ω
12.5Ω
12.5Ω
12.5Ω
R
R
R
R
OUT
OUT
OUT
OUT
, V
+
B (Pins 15, 20, 7, 12 ): Positive Power Supply
OCMB
+OUTB
+OUTA
17
10
(Pins 19, 8): These pins set the output
640020 BD
16
15
14
13
12
11
–OUTA
V
V
–OUTB
V –
V –
+
+
A
B
. The Exposed Pad must be
LTC6420-20
642020fb
7

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