MAX9777ETI+T Maxim Integrated Products, MAX9777ETI+T Datasheet - Page 16

• Manufacturer Part Number: MAX9777ETI+T
• Description: IC AMP AUDIO PWR 2.6W AB 28TQFN
• Manufacturer: Maxim Integrated Products
• Type: Class ABr

Specifications of MAX9777ETI+T

• Output Type: 2-Channel (Stereo) with Stereo Headphones
• Max Output Power X Channels @ Load: 2.6W x 2 @ 4 Ohm; 200mW x 2 @ 16 Ohm
• Voltage - Supply: 4.5 V ~ 5.5 V
• Features: Depop, I²C, Input Multiplexer, Mute, Shutdown, Thermal Protection
• Mounting Type: Surface Mount
• Package / Case: 28-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
There are three registers that configure the MAX9777:
the MUTE register, SHDN register, and control register.
In write data mode (R/W = 0), the register address and
data byte follow the device address (Figure 7).
The MUTE register (01hex) is a read/write register that
sets the MUTE status of the device. Bit 3 (MUTEL) of
the MUTE register controls the left channel; bit 4
(MUTER) controls the right channel. A logic-high mutes
the respective channel; a logic-low brings the channel
out of mute.
The SHDN register (02hex) is a read/write register that
controls the power-up state of the device. A logic-high
Figure 7. Write/Read Data Format Example
Table 3. MAX9777 MUTE Register Format
*Default state.
16
BIT
7
6
5
4
3
2
1
0
REGISTER
ADDRESS
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
MUTER
MUTEL
NAME
X
X
X
X
X
X
S
S
Don’t Care
Don’t Care
Don’t Care
Don’t Care
Don’t Care
Don’t Care
VALUE
I
I
2
2
C SLAVE ADDRESS.
C SLAVE ADDRESS.
SELECTS DEVICE.
SELECTS DEVICE.
ADDRESS
ADDRESS
0*
0*
1
1
7 BITS
7 BITS
0000 0001
WR
WR
Unmute right channel
Write Data Format
Unmute left channel
Mute right channel
Mute left channel
ACK
ACK
DESCRIPTION
MUTE Register
SHDN Register
SELECTS REGISTER TO BE
—
—
—
—
—
—
REGISTER ADDRESS.
REGISTER ADDRESS.
COMMAND
COMMAND
SELECTS REGISTER
8 BITS
8 BITS
WRITTEN TO.
TO BE READ.
ACK
ACK
in bit 0 of the SHDN register shuts down the device; a
logic-low turns on the device. A logic-high is required in
bits 2 to 7 to reset all registers to their default settings.
The control register (03hex) is a read/write register that
determines the device configuration. Bit 1 (IN1/IN2) con-
trols the input multiplexer, a logic-high selects input 1; a
logic-low selects input 2. Bit 2 (HPS_D) controls the
headphone sensing. A logic-low configures the device in
automatic headphone detection mode. A logic-high dis-
ables the HPS input. Bit 3 (GAINA/B) controls the gain-
select multiplexer. A logic-low selects GAINA. A logic-
high selects GAINB. GAINA/B is ignored when HPS_D =
0. Bit 4 (SPKR/HP) selects the amplifier operating mode
when HPS_D = 1. A logic-high selects speaker mode,
and a logic-low selects headphone mode.
S
Table 4. MAX9777 SHDN Register Format
*Default state.
REGISTER ADDRESS
8 BITS
DATA
BIT
REGISTER DATA
I
7
6
5
4
3
2
1
0
2
C SLAVE ADDRESS.
SELECTS DEVICE.
ADDRESS
7 BITS
ACK
RESET
RESET
RESET
RESET
RESET
RESET
NAME
SHDN
P
1
WR
X
ACK
SELECTED REGISTER
Don’t Care
VALUE
8 BITS
DATA
DATA FROM
0*
0*
0*
0*
0*
0*
0*
1
1
1
1
1
1
1
0000 0010
P
1
Control Register
Normal operation
DESCRIPTION
Reset device
Reset device
Reset device
Reset device
Reset device
Reset device
Shutdown
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—
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