MB84VD21081-85-PTS Fujitsu, MB84VD21081-85-PTS Datasheet
MB84VD21081-85-PTS
Related parts for MB84VD21081-85-PTS
MB84VD21081-85-PTS Summary of contents
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... FUJITSU SEMICONDUCTOR DATA SHEET Stacked MCP (Multi-Chip Package) FLASH MEMORY & SRAM CMOS 16M ( 8/ 16) FLASH MEMORY & 16) STATIC RAM MB84VD2108X FEATURES • Power supply voltage of 2.7 to 3.6 V • High performance 85 ns maximum access time • Operating Temperature • ...
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MB84VD2108X -85 (Continued) 1. FLASH MEMORY • Simultaneous Read/Write operations (dual bank) Miltiple devices available with different bank sizes Host system can program or erase in one bank, then immediately and simultaneously read from the other bank Zero latency between ...
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MB84VD2108X PIN ASSIGNMENTS N. CEf OE G CE1 ...
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MB84VD2108X -85 N. N.C. WE CE2s RESET WP/ACC RY/BY UBs LBs N.C. 4 ...
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MB84VD2108X PIN DESCRIPTION Pin Address Inputs (Common Address Input (Flash) – Address Input (SRAM Data Inputs/Outputs (Common CEf Chip Enable (Flash) CE1s ...
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MB84VD2108X -85 BLOCK DIAGRAM WP/ACC RESET CEf CIOf SA LBs UBs WE OE CE1s CE2s CIOs 6 /MB84VD2109X - RY/ bit ...
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DEVICE BUS OPERATIONS Table 2.1 User Bus Operations (Flash Operation CEf CE1s CE2s OE WE (Note1 Full Standby Output Disable Read from Flash L (Note Write to ...
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MB84VD2108X -85 Table 2.2 User Bus Operations (Flash Operation CEf CE1s CE2s (Note Full Standby Output Disable Read from Flash L (Note Write ...
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Table 2.3 User Bus Operations (Flash Operation DQ CEf CE1s CE2s (Note Full Standby Output Disable Read from H X Flash (Note ...
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... SA27 SA26 SA25 SA24 SA23 SA22 SA21 SA20 SA19 SA18 SA17 SA16 SA15 SA14 SA13 Bank 2 SA12 MB84VD21081 SA11 SA10 Bank 2 MB84VD21082 SA9 SA8 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 MB84VD2108X Sector Architecture (Top Boot Block) -85 Word Mode Byte Mode ...
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MB84VD2108X • Eight 4 K words, and thirty one 32 K words. • Individual-sector, multiple-sector, or bulk-erase capability. Bank 2 MB84VD21094 Bank 2 MB84VD21093 MB84VD21092 Bank 1 MB84VD21094 Bank 1 MB84VD21093 MB84VD21092 MB84VD2109X Sector Architecture (Top Boot Block) /MB84VD2109X -85 ...
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... MB84VD2108X -85 Table 3.1 Sector Address Tables (MB84VD21081) Bank Sector Bank Address SA0 0 0 SA1 0 0 SA2 0 0 SA3 0 0 SA4 0 0 SA5 0 0 SA6 0 0 SA7 0 0 SA8 0 1 SA9 0 1 SA10 0 1 SA11 0 1 SA12 0 1 SA13 0 1 SA14 ...
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MB84VD2108X Table 3.2 Sector Address Tables (MB84VD21091) Sector Address Bank Sector Bank Address SA0 SA1 SA2 SA3 Bank 1 SA4 0 0 ...
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MB84VD2108X -85 Table 3.3 Sector Address Tables (MB84VD21082) Bank Sector Bank Address SA0 0 0 SA1 0 0 SA2 0 0 SA3 0 0 SA4 0 0 SA5 0 0 SA6 0 0 SA7 0 0 ...
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MB84VD2108X Table 3.4 Sector Address Tables (MB84VD21092) Sector Address Bank Sector Bank Address SA0 SA1 SA2 SA3 SA4 Bank ...
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MB84VD2108X -85 Table 3.5 Sector Address Tables (MB84VD21083) Bank Sector Bank Address SA0 0 0 SA1 0 0 SA2 0 0 SA3 0 0 SA4 0 0 SA5 0 0 SA6 0 0 SA7 0 0 ...
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MB84VD2108X Table 3.6 Sector Address Tables (MB84VD21093) Sector Address Bank Sector Bank Address SA0 SA1 SA2 SA3 SA4 SA5 ...
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MB84VD2108X -85 Table 3.7 Sector Address Tables (MB84VD21084) Bank Sector Bank Address SA0 0 0 SA1 0 0 SA2 0 0 SA3 0 0 SA4 0 0 SA5 0 0 SA6 0 0 SA7 0 0 ...
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MB84VD2108X Table 3.8 Sector Address Tables (MB84VD21094) Sector Address Bank Sector Bank Address SA0 SA1 SA2 SA3 SA4 SA5 ...
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MB84VD2108X -85 Table 4.1 Sector Group Addresses (MB84VD2108X) Sector Group SGA0 SGA1 SGA2 0 0 SGA3 0 1 SGA4 0 1 SGA5 1 0 SGA6 1 0 SGA7 ...
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Table 4.2 Sector Group Addresses (MB84VD2109X) Sector Group SGA0 0 0 SGA1 0 0 SGA2 0 0 SGA3 0 0 SGA4 0 0 SGA5 0 0 SGA6 0 0 SGA7 SGA8 0 ...
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... MB84VD2108X -85 Type Manufacturer’s Code Byte MB84VD21081 Word Byte MB84VD21091 Word Byte MB84VD21082 Word Byte MB84VD21092 Word Device Code Byte MB84VD21083 Word Byte MB84VD21093 Word Byte MB84VD21084 Word Byte MB84VD21094 Word Sector Group protect * for Byte mode Output 01H at protected sector address and output 00H at unprotected sector address. ...
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Table 6 Flash Memory Command Definitions Bus First Bus Command Write Write Cycle Sequence Cycles Req’d Addr. Data Addr. Read/Reset (Note 1) 1 XXXH F0H Word 555H Read/Reset 3 (Note 1) Byte AAAH Word 555H Autoselect 3 Byte AAAH Word ...
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MB84VD2108X - Both Read/Reset commands are functionally equivalent, resetting the device to the read mode This command is valid while Fast Mode This command is valid while RESET 4 : The valid Address is ...
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... No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. MB84VD2108X -85 Symbol Min ...
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MB84VD2108X -85 ELECTRICAL CHARACTERISTICS 1. DC Characteristics Parameter Parameter Description Symbol I Input Leakage Current LI I Output Leakage Current LO RESET Inputs Leakage I LIT Current ACC Input Leakage I LIA Current Flash V Active Current ...
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Parameter Parameter Description Symbol V Input Low Level IL V Input High Level IH Voltage for Sector Protection, and Temporary V ID Sector Unprotection (RESET) (Note 4) Voltage for Program V Acceleration (WP/ACC) ACC (Note4) V Output Low Voltage ...
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MB84VD2108X - Characteristics • CE Timing Parameter Symbols JEDEC Standard t CE Recover Time CCR • Timing Diagram for alternating SRAM to Flash CEf CE1s CE2s 28 /MB84VD2109X -85 Description t CCR t CCR Test Setup -85 Unit ...
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Read Only Operations Characteristics (Flash) Parameter Symbols JEDEC Standard t t Read Cycle Time AVAV Address to Output Delay AVQV ACC Chip Enable to Output Delay ELQV Output Enable to ...
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MB84VD2108X -85 • Read Cycle (Flash) Addresses CEf Addresses CEf t RP RESET DQ 30 /MB84VD2109X t RC Addresses Stable t ACC OEH HIGH Addresses Stable ...
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MB84VD2108X • Erase/Program Operations (Flash) Parameter Symbols JEDEC Standard t t Write Cycle Time AVAV Address Setup Time (WE to Addr.) AVWL AS t Address Setup Time to CEf Low During Toggle Bit Polling ASO t t ...
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MB84VD2108X -85 (Continued) Parameter Symbols JEDEC Standard Setup Time VCS CC t Voltage Transition Time (Note 2) VLHT t Rise Time to V VIDR t Rise Time to V VACCR t Recover Time from RY/ ...
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MB84VD2108X • Write Cycle (WE control) (Flash) 3rd Bus Cycle Addresses 555H CEf GHWL WPH A0H Notes : ...
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MB84VD2108X -85 • Write Cycle (CEf control) (Flash) 3rd Bus Cycle Addresses GHEL CEf DQ Notes : address of the memory location to be programmed data to be programmed ...
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MB84VD2108X • AC Waveforms Chip/Sector Erase Operations (Flash) 555H Addresses t WC CEf GHWL AAH DQ t VCS the sector address for Sector Erase. ...
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MB84VD2108X -85 • AC Waveforms for Data Polling during Embedded Algorithm Operations (Flash) CEf Data Data In ( RY/ Valid Data (The device has completed the ...
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MB84VD2108X • AC Waveforms for Toggle Bit during Embedded Algorithm Operations (Flash) Addresses CEf WE t OEH Toggle DQ /DQ Data 6 2 Data t BUSY RY/ stops toggling (The device has ...
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MB84VD2108X -85 • Back-to-back Read/Write Timing Diagram (Flash) Read t RC Address BA1 t AS CEf OE t GHWL WE Valid DQ Output Note : This is example of Read for Bank 1 and Embedded Algorithm (program) for Bank 2. ...
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MB84VD2108X • RY/BY Timing Diagram during Write/Erase Operations (Flash) CEf WE RY/BY • RESET, RY/BY Timing Diagram (Flash) WE RESET RY/BY /MB84VD2109X -85 The rising edge of the last write pulse Entire programming or erase operations t BUSY t RP ...
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MB84VD2108X -85 • Temporary Sector Unprotection (Flash VIDR t VCS RESET CEf WE RY/BY 40 /MB84VD2109X -85 t VLHT Program or Erase Command Sequence Unprotection Period t VLHT VLHT ...
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MB84VD2108X • Extended Sector Protection (Flash VCS RESET t VLHT t t VIDR WC Address CEf Data 60H SGAx : Sector Group Address to be protected ...
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MB84VD2108X -85 • Accelerated Program (Flash VACCR t VCS V ACC 3 V WP/ACC CE WE RY/BY 42 /MB84VD2109X -85 t Program or Erase Command Sequence VLHT Acceleration period t VLHT VLHT ...
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MB84VD2108X • Read Cycle (SRAM) Parameter Parameter Description Symbol t Read Cycle Time RC t Address Access Time AA t Chip Enable (CE1s) Access Time CO1 t Chip Enable (CE2s) Access Time CO2 t Output Enable Access Time OE t ...
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MB84VD2108X -85 • Read Cycle (Note) (SRAM) Addresses CE1s CE2s OE LBs, UBs DQ Note : WE remains HIGH for the read cycle. 44 /MB84VD2109X - CO1 t COE t CO2 OEE ...
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MB84VD2108X • Write Cycle (SRAM) Parameter Parameter Description Symbol t Write Cycle Time WC t Write Pulse Width WP t Chip Enable to End of Write CW t Address valid to End of Write ...
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MB84VD2108X -85 • Write Cycle (Note 3) (WE control) (SRAM) Addresses CE1s CE2s LBs, UBs D OUT D IN Notes : 1.If CE1s goes LOW (or CE2s goes HIGH) coincident with or after WE goes LOW, the ...
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MB84VD2108X • Write Cycle (Note 1) (CE1s control) (SRAM) Addresses CE1s CE2s LBs, UBs D OUT D IN Notes : 1. HIGH during the write cycle, the outputs will remain at high impedance. 2.Because I/O ...
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MB84VD2108X -85 • Write Cycle (Note 1) (CE2s Control) (SRAM) Addresses CE1s CE2s LBs, UBs D OUT D IN Notes : 1. HIGH during the write cycle, the outputs will remain at high impedance. 2.Because ...
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MB84VD2108X • Write Cycle (Note 1) ( Control) (SRAM Addresses WE CE1s CE2s t AS LBs, UBs D OUT D IN Note 2 Notes : 1. HIGH during the write cycle, the outputs will ...
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MB84VD2108X -85 ERASE AND PROGRAMMING PERFORMANCE ( Parameter Sector Erase Time Byte Programming Time Word Programming Time Chip Programming Time Erase/Program Cycle DATA RETENTION CHARACTERISTICS ( Parameter Parameter Description Symbol V Data Retention Supply Voltage DH I Standby Current DDS2 ...
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CE2s Controlled Data Retention Mode (Note 2 CE2s CDR V IL GND Notes : 1.In CE1s controlled data retention mode, input level of CE2s should be fixed Vccs to ...
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MB84VD2108X -85 ORDERING INFORMATION MB84VD2108 X DEVICE NUMBER/DESCRIPTION 16 Mega-bit (2 M 3.0 V-only Read, Program, and Erase 2 Mega-bit (256 K BOOT CODE SECTOR ARCHITECTURE 84VD2108 84VD2109 52 /MB84VD2109X -85 -85 -PBS PACKAGE TYPE PBS 61-ball FBGA PTS 56-pin ...
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... MB84VD2108X PACKAGE DIMENSIONS 61-ball plastic FBGA (BGA-61P-M02) 9.00±0.10(.354±.004)SQ INDEX-MARK AREA 0.10(.004) 1999 FUJITSU LIMITED B61002S-1C-1 C /MB84VD2109X -85 +0.15 1.25 5.60(.220)REF –0.10 (Mounting height) +.006 .049 –.004 0.80(.031) 0.38±0.10 (Stand off) (.015±.004) 0.80(.031) 5.60(.220) REF 7.20(.283 +0.10 61-Ø0.45 – ...
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... TSOP(I) (FPT-56P-M04) 14.00±0.20(.551±.008) 12.40±0.10(.488±.004) INDEX +0.05 0.145 –0.03 0.08(.003) +.002 .006 –.001 1998 FUJITSU LIMITED F56004S-1C /MB84VD2109X -85 0.40(.016) TYP 12.00±0.10 (.472±.004) 0.18±0.035 0.10(.004) (.007±.001) "A" ...
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... The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. ...