IDT71V256SA15TP Integrated Device Technology, Inc., IDT71V256SA15TP Datasheet

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IDT71V256SA15TP

Manufacturer Part Number
IDT71V256SA15TP
Description
Low power 3.3V CMOS fast SRAM 256K (32 x 8-bit)
Manufacturer
Integrated Device Technology, Inc.
Datasheet

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The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FEATURES
• Ideal for high-performance processor secondary cache
• Commercial (0 to 70 C) and Industrial (-40 to 85 C)
• Fast access times:
• Low standby current (maximum):
• Small packages for space-efficient layouts:
• Produced with advanced high-performance CMOS
• Inputs and outputs are LVTTL-compatible
• Single 3.3V( 0.3V) power supply
FUNCTIONAL BLOCK DIAGRAM
INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
1997 Integrated Device Technology, Inc.
I/O
I/O
A
temperature options
— Commercial: 10/12/15/20ns
— Industrial: 15ns
— 2mA full standby
— 28-pin 300 mil SOJ
— 28-pin 300 mil plastic DIP (Commercial only)
— 28-pin TSOP Type I
technology
Integrated Device Technology, Inc.
A
14
0
7
0
WE
CS
OE
CONTROL
CIRCUIT
DECODER
ADDRESS
CIRCUIT
INPUT
DATA
LOW POWER
3.3V CMOS FAST SRAM
256K (32K x 8-BIT)
DESCRIPTION
organized as 32K x 8. It is fabricated using IDT’s high-
performance, high-reliability CMOS technology.
istics while at the same time maintaining very high perfor-
mance. Address access times of as fast as10 ns are ideal for
3.3V secondary cache in 3.3V desktop designs.
standby mode, its very low power characteristics contribute to
extended battery life. By taking
automatically go to a low power standby mode and will remain
in standby as long as
full standby mode (
tion is guaranteed to always be less than 6.6mW and typically
will be much smaller.
pin 300 mil plastic DIP, and 28-pin 300 mil TSOP Type I
packaging.
The IDT71V256SA is a 262,144-bit high-speed static RAM
The IDT71V256SA has outstanding low power character-
When power management logic puts the IDT71V256SA in
The IDT71V256SA is packaged in 28-pin 300 mil SOJ, 28-
MEMORY ARRAY
I/O CONTROL
262,144 BIT
CS
CS
at CMOS level, f=0), power consump-
remains HIGH. Furthermore, under
CS
HIGH, the SRAM will
IDT71V256SA
V
GND
CC
MAY 1997
3101 drw 01
DSC-3101/04
1

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IDT71V256SA15TP Summary of contents

Page 1

... CIRCUIT I CONTROL CIRCUIT WE The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES 1997 Integrated Device Technology, Inc. LOW POWER 3.3V CMOS FAST SRAM 256K (32K x 8-BIT) DESCRIPTION The IDT71V256SA is a 262,144-bit high-speed static RAM organized as 32K fabricated using IDT’s high- performance, high-reliability CMOS technology ...

Page 2

IDT71V256SA 3.3V CMOS STATIC RAM 256K (32K x 8-BIT) PIN CONFIGURATIONS SO28 P28 ...

Page 3

IDT71V256SA 3.3V CMOS STATIC RAM 256K (32K x 8-BIT) DC ELECTRICAL CHARACTERISTICS (V = 3.3V 0.3V 0.2V Symbol Parameter I Dynamic Operating Current CC Open Max MAX I ...

Page 4

IDT71V256SA 3.3V CMOS STATIC RAM 256K (32K x 8-BIT) AC ELECTRICAL CHARACTERISTICS Symbol Parameter Read Cycle t Read Cycle Time RC t Address Access Time AA t Chip Select Access Time ACS (1) t Chip Select to Output in Low-Z ...

Page 5

IDT71V256SA 3.3V CMOS STATIC RAM 256K (32K x 8-BIT) TIMING WAVEFORM OF READ CYCLE NO. 2 ADDRESS PREVIOUS DATA VALID DATA OUT TIMING WAVEFORM OF READ CYCLE NO DATA OUT NOTES HIGH for Read cycle. WE ...

Page 6

IDT71V256SA 3.3V CMOS STATIC RAM 256K (32K x 8-BIT) TIMING WAVEFORM OF WRITE CYCLE NO ADDRESS DATA IN NOTES must be HIGH during all address transitions write occurs ...

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