MX29F800BTC-70 Macronix International Co., MX29F800BTC-70 Datasheet
MX29F800BTC-70
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MX29F800BTC-70 Summary of contents
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FEATURES • 1,048,576 x 8/524,288 x 16 switchable • Single power supply operation - 5.0V only operation for read, erase and program operation • Fast access time: 70/90/120ns • Low power consumption - 50mA maximum active current - 0.2uA typical ...
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PIN CONFIGURATIONS 44 SOP(500 mil) RESET 44 RY/ A18 A8 A17 A10 A11 A12 A13 A14 ...
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BLOCK STRUCTURE MX29F800T TOP BOOT SECTOR ADDRESS TABLE Sector A18 A17 A16 A15 SA0 SA1 SA2 SA3 SA4 SA5 0 ...
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BLOCK DIAGRAM CONTROL CE INPUT OE LOGIC WE ADDRESS LATCH A0-A18 AND BUFFER Q0-Q15/A-1 P/N:PM0578 MX29F800T/B PROGRAM/ERASE HIGH VOLTAGE MX29F800T/B FLASH ARRAY ARRAY SOURCE HV Y-PASS GATE PGM SENSE DATA AMPLIFIER HV PROGRAM DATA LATCH I/O BUFFER 4 WRITE STATE ...
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AUTOMATIC PROGRAMMING The MX29F800T/B is byte programmable using the Au- tomatic Programming algorithm. The Automatic Pro- gramming algorithm makes the external system do not need to have time out sequence nor to verify the data programmed. The typical chip programming ...
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TABLE1. SOFTWARE COMMAND DEFINITIONS First Bus Command Bus Cycle Cycle Addr Reset 1 XXXH F0H Read 1 RA Read Silicon ID Word 4 555H AAH Byte 4 AAAH AAH Sector Protect Word 4 555H AAH Verify Byte 4 AAAH AAH ...
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COMMAND DEFINITIONS Device operations are selected by writing specific ad- dress and data sequences into the command register. Writing incorrect address and data values or writing them in the improper sequence will reset the device to the read mode. Table ...
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READ/RESET COMMAND The read or reset operation is initiated by writing the read/reset command sequence into the command reg- ister. Microprocessor read cycles retrieve array data. The device remains enabled for reads until the com- mand register contents are altered. ...
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SECTOR ERASE COMMANDS The Automatic Sector Erase does not require the de- vice to be entirely pre-programmed prior to executing the Automatic Set-up Sector Erase command and Au- tomatic Sector Erase command. Upon executing the Automatic Sector Erase command, the ...
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ERASE SUSPEND This command only has meaning while the state ma- chine is executing Automatic Sector Erase operation, and therefore will only be responded during Automatic Sector Erase operation. When the Erase Suspend com- mand is written during a sector ...
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Erase Suspend mode the standby mode. Table 4 shows the outputs for RY/BY. Q6:Toggle BIT I Toggle Bit indicates whether an Automatic Pro- gram ...
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Q5 Exceeded Timing Limits Q5 will indicate if the program or erase time has ex- ceeded the specified limits(internal pulse count). Un- der these conditions Q5 will produce a "1". This time- out condition indicates that the program or erase ...
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SECTOR PROTECTION The MX29F800T/B features hardware sector protection. This feature will disable both program and erase opera- tions for these sectors protected. To activate this mode, the programming equipment must force VID on address pin A9 and control pin OE, ...
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CAPACITANCE 1.0 MHz SYMBOL PARAMETER CIN1 Input Capacitance CIN2 Control Pin Capacitance COUT Output Capacitance READ OPERATION DC CHARACTERISTICS TA = -40 SYMBOL PARAMETER ILI Input Leakage Current ILO Output Leakage Current ISB1 ...
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READ TIMING WAVEFORMS VIH Addresses VIL VIH CE VIL VIH WE VIL VIH OE VIL HIGH Z VOH Outputs VOL COMMAND PROGRAMMING/DATA PROGRAMMING/ERASE OPERATION DC CHARACTERISTICS TA = -40 SYMBOL PARAMETER ICC1 (Read) Operating VCC Current ICC2 ICC3 (Program) ICC4 ...
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AC CHARACTERISTICS TA = -40 SYMBOL PARAMETER tOES OE setup time tCWC Command programming cycle tCEP WE programming pulse width tCEPH1 WE programming pluse width High tCEPH2 WE programming pluse width High tAS Address setup time tAH Address hold time ...
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SWITCHING TEST CIRCUITS DEVICE UNDER TEST CL=100pF Including jig capacitance SWITCHING TEST WAVEFORMS 2.4V 0.45V AC TESTING: Inputs are driven at 2.4V for a logic "1" and 0.45V for a logic "0". Input pulse rise and fall times are <20ns. ...
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AUTOMATIC PROGRAMMING TIMING WAVEFORM One byte data is programmed. Verify in fast algorithm and additional programming by external control are not required because these operations are executed auto- matically by internal control circuit. Programming completion can be verified by DATA ...
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AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART (WORD MODE) Increment Address P/N:PM0578 MX29F800T/B START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data A0H Address 555H Write Program Data/Address Data Poll from system No Verify Word Ok ? YES No ...
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AUTOMATIC CHIP ERASE TIMING WAVEFORM All data in chip are erased. External erase verification is not required because data is erased automatically by internal control circuit. Erasure completion can be verified by DATA polling and toggle bit checking after AUTOMATIC ...
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AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART (WORD MODE) P/N:PM0578 MX29F800T/B START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 10H Address 555H ...
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AUTOMATIC SECTOR ERASE TIMING WAVEFORM Sector data indicated by A12 to A18 are erased. Exter- nal erase verify is not required because data are erased automatically by internal control circuit. Erasure comple- tion can be verified by DATA polling and ...
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AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART (WORD MODE) Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 30H Sector Address Data Poll from ...
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ERASE SUSPEND/ERASE RESUME FLOWCHART P/N:PM0578 MX29F800T/B START Write Data B0H NO Toggle Bit checking Q6 not toggled YES Read Array or Program Reading or NO Programming End YES Write Data 30H Continue Erase Another NO Erase Suspend ? YES 24 ...
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TIMING WAVEFORM FOR SECTOR PROTECTION A1 A6 12V 5V A9 tVLHT 12V 5V OE tVLHT WE CE Data A18-A12 P/N:PM0578 MX29F800T/B tWPP 1 tOESP Sector Address 25 Verify tVLHT 01H F0H tOE REV. 1.7, JUL. 24, 2001 ...
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TIMING WAVEFORM FOR CHIP UNPROTECTION A1 12V 5V A9 tVLHT A6 12V 5V OE tVLHT WE CE Data A18-A12 P/N:PM0578 MX29F800T/B tWPP 2 tOESP 26 Verify tVLHT 00H F0H tOE Sector Address REV. 1.7, JUL. 24, 2001 ...
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SECTOR PROTECTION ALGORITHM No PLSCNT=32? Device Failed P/N:PM0578 START Set Up Sector Addr (A18,A16,A15,A14,A13,A12) PLSCNT=1 OE=VID,A9=VID,CE=VIL A6=VIL Activate WE Pulse Time Out 10us Set WE=VIH, CE=OE=VIL A9 should remain VID Read from Sector Addr=SA, A1=1 No Data=01H? Yes Yes Protect ...
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CHIP UNPROTECTION ALGORITHM Increment Sector Addr * It is recommended before unprotect whole chip, all sectors should be protected in advance. P/N:PM0578 MX29F800T/B START Protect All Sectors PLSCNT=1 Set OE=A9=VID CE=VIL,A6=1 Activate WE Pulse Time Out 12ms Set OE=CE=VIL A9=VID,A1=1 ...
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AC CHARACTERISTICS Parameter Std Description tREADY1 RESET PIN Low (During Automatic Algorithms) to Read or Write (See Note) tREADY2 RESET PIN Low (NOT During Automatic Algorithms) to Read or Write (See Note) tRP1 RESET Pulse Width (During Automatic Algorithms) tRP2 ...
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TEMPORARY SECTOR UNPROTECT Parameter Std. Description tVIDR VID Rise and Fall Time (See Note) tRSP RESET Setup Time for Temporary Sector Unprotect Note: Not 100% tested TEMPORARY SECTOR UNPROTECT TIMING DIAGRAM 12V RESET tVIDR CE WE RY/BY ...
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TEMPORARY SECTOR UNPROTECT ALGORITHM Temporary Sector Unprotect Completed(Note 2) Note : 1. All protected sectors are temporary unprotected. 2. All previously protected sectors are protected again. P/N:PM0578 Start RESET = VID (Note 1) Perform Erase or Program Operation Operation Completed ...
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DATA POLLING TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS) Address tCE CE tOE OE Q7 Q0-Q6 NOTES: VA=Valid address. Figure shows are first status cycle after command sequence, last status read cycle, and array data raed cycle. P/N:PM0578 MX29F800T/B VA tDF tOH ...
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Data Polling Algorithm No Notes: 1.VA=valid address for programming. 2.Q7 should be rechecked even Q5="1"because Q7 may change simultaneously with Q5. P/N:PM0578 MX29F800T/B START Read Q7~Q0 Add (1) Yes Q7 = Data ? ...
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TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALOGRITHMS) Address VA tCE CE tOE OE Q6/Q2 NOTES: VA=Valid address; not required for Q6. Figure shows first two status cycle after command sequence, last status read cycle, and array data read cycle. P/N:PM0578 ...
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Toggle Bit Algorithm NO Complete, Write Reset Command Note: 1.Read toggle bit twice to determine whether or not it is toggling. 2.Recheck toggle bit because it may stop toggling as Q5 changes to "1". P/N:PM0578 START Read Q7~Q0 Read Q7~Q0 ...
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ID CODE READ TIMING WAVEFORM VCC 5V VID ADD VIH A9 VIL VIH ADD A0 VIL tACC ADD VIH A1-A8 A10-A18 VIL CE VIH VIL VIH WE VIL VIH OE VIL VIH DATA VIL Q0-Q15 P/N:PM0578 tACC tCE tOE tOH ...
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ERASE AND PROGRAMMING PERFORMANCE(1) PARAMETER Sector Erase Time Chip Erase Time Byte Programming Time Word Programming Time Chip Programming Time Erase/Program Cycles Note: 1.Not 100% Tested, Excludes external system level over head. 2.Typical values measured at 25°C, 5V. 3.Maximum values ...
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ORDERING INFORMATION PLASTIC PACKAGE (Top Boot Sector as an sample. For Bottom Boot Sector ones,MX29F800Txx will change to MX29F800Bxx) PART NO. ACCESS TIME (ns) MX29F800TMC-70 70 MX29F800TMC-90 90 MX29F800TMC-12 120 MX29F800TTC-70 70 MX29F800TTC-90 90 MX29F800TTC-12 120 MX29F800TMI-90 90 MX29F800TMI-12 120 ...
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PACKAGE INFORMATION 48-PIN PLASTIC TSOP P/N:PM0578 MX29F800T/B 39 REV. 1.7, JUL. 24, 2001 ...
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PLASTIC SOP P/N:PM0578 MX29F800T/B 40 REV. 1.7, JUL. 24, 2001 ...
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REVISION HISTORY Revision No. Description 1.1 Modified chip erase time to 13/35 sec Corrected content error 1.2 Add erase suspend ready max. 100us in ERASE SUSPEND's section at page10 1.3 Corrected content error at TOP BOOT SECTOR ADDRESS TABLE P3 ...
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... TEL:+65-348-8385 FAX:+65-348-8096 TAIPEI OFFICE: TEL:+886-2-2509-3300 FAX:+886-2-2509-2200 ACRONIX MERICA, NC. TEL:+1-408-453-8088 FAX:+1-408-453-8488 CHICAGO OFFICE: TEL:+1-847-963-1900 FAX:+1-847-963-1909 http : //www.macronix.com MX29F800T O., TD. MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. 42 ...